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SP3508CF 数据表(PDF) 25 Page - Sipex Corporation

部件名 SP3508CF
功能描述  Rugged 3.3V, 20Mbps, 8 Channel Multiprotocol Transceiver with Programmable DCE/DTE and Termination Resistors
PDF  33 Pages
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制造商  SIPEX [Sipex Corporation]
网页  http://www.sipex.com
标志 SIPEX - Sipex Corporation

SP3508CF 数据表(HTML) 25 Page - Sipex Corporation

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Date: 06/14/04
SP3508 Enhanced WAN Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
Phase 2
-VSS1 transfer -Phase two of the clock connects the negative terminal of C2 to the VSS1 storage capacitor
and the positive terminal of C2 to ground, and transfers the negative generated voltage to CVSS1. This
generated voltage is regulated to -5.5V. Simultaneously, the positive side of the capacitor C1 is switched
to VCC and the negative side is connected to ground.
FEATURES
Phase 3
-VDD charge storage -The third phase of the clock is identical to the first phase-the charge transferred in
C1 produces -VCC in the negative terminal of C1 which is applied to the negative side of the capacitor C2.
Since C2+ is at VCC, the voltage potential across C2 is 2xVCC.
VCC = +3V
–6V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
+
+
++
CVDD
CVSS1
Figure 46. Charge Pump - Phase 2.
VCC = +3V
–3V
+3V
–3V
VSS1 Storage Capacitor
VDD Storage Capacitor
C1
C2
+
+
++
CVSS1
CVDD
Figure 47.Charge Pump - Phase 3.
Phase 4
-VDD transfer -The fourth phase of the clock connects the negative terminal of C2 to ground, and transfers
the generated 5.5V across C2 to CVDD, the VDD storage capacitor. This voltage is regulated to +5.5V. At
the regulated voltage, the internal oscillator is disabled and simultaneously with this, the positive side of
capacitor C1 is switched to VCC and the negative side is connected to ground, and the cycle begins again.
The charge pump cycle will continue as long as the operational conditions for the internal oscillator are
present. Since both V+ and V- are separately generated from VCC; in a no-load condition V+ and V- will
be symmetrical. Older charge pump approaches that generate V- from V+ will show a decrease in the
magnitude of
V- compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump
typically operates at 250kHz. The external capacitors can be as low as 1
µF with a 16V breakdown voltage
rating.



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