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96L02DMQB 数据表(PDF) 4 Page - National Semiconductor (TI) |
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96L02DMQB 数据表(HTML) 4 Page - National Semiconductor (TI) |
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4 / 6 page ![]() Operation Notes (Continued) TLF10203 – 5 Input to Pin 4 (12) Pins 5 (11) and 3 (13) e H 6 RESET OPERATIONA LOW signal on CD pin 3 (13) will terminate an output pulse causing Q to go LOW and Q to go HIGH As long as CD is held LOW a delay period cannot be initiated nor will attempted triggering cause spikes at the outputs A reset pulse duration in the LOW state of 25 ns is sufficient to insure resetting If the reset input goes LOW at the same time that a trigger transition occurs the reset will dominate and the outputs will not respond to the trigger If the reset input goes HIGH coinci- dent with a trigger transition the circuit will respond to the trigger 96L02 Pulse Width vs RX and CX TLF10203 – 6 FIGURE a Typical Characteristics tw vs VCC tw(min) vs TA tw vs TA TLF10203 – 7 INPUT PULSE f j 25 kHz Amp j 30V Width j 100 ns tr e tf s 10 ns TLF10203 – 8 FIGURE b 4 |
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