PI6LC48L0201LE datasheet(2/10 Pages) PERICOM

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PI6LC48L0201

Rev. A

07/23/2013

PI6LC48L0201

2-Output LVDS Networking Clock Generator

Pinout Table

Pin No.

Pin Name

I/O Type

Description

1, 7, 16

No connection

2, 20

VDDO

Power

Output Power Supply

3,4

CLK0, CLK0#

Output

LVDS Output clock 0

M_reset

Input

Pull-down Master reset. “1”, CLK0CLK1 go to “low”, CLK0#/CLK1# go to

“high”; “0” outputs are enabled

PLL_ByPass

Input

Pull-down PLL bypass select. “0” PLL is enabled, “1” PLL is bypassed

VDDA

Power

Analog Power Supply

9, 11

N_SEL0, N_SEL1 Input

Pull-down Output frequency select

VDD

Power

Core Power Supply

12, 13

XTAL_OUT,

XTAL_IN

Crystal

Crystal input and output

Ref_IN

Input

Pull-down CMOS reference clock input

IN_SEL

Input

Pull-down “0” selects Crystal, “1” selects reference input

GND

Ground

18, 19

CLK1#,

CLK1

Output

LVDS Output clock 1

Pin Configuration

VDDA

CLK1

M_reset

Ref_IN

CLK1#

CLK0

CLK0#

IN_SEL

PLL_ByPass

VDDO

XTAL_IN

N_SEL0

XTAL_OUT

VDD

GND

N_SEL1

VDDO

13-0115

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