3.0 POWER SUPPLY CONSIDERATIONS

A/D converters draw sufficient transient current to corrupt

their own power supplies if not adequately bypassed. A 10µF

to 50µF tantalum or aluminum electrolytic capacitor should

be placed within an inch (2.5 centimeters) of the A/D power

pins, with a 0.1µF ceramic chip capacitor placed as close as

possible to each of the converter’s power supply pins. Lead-

less chip capacitors are preferred because they have low

lead inductance.

While a single voltage source should be used for the analog

and digital supplies of the ADC10321, these supply pins

should be well isolated from each other to prevent any digital

noise from being coupled to the analog power pins. A choke

or ferrite bead is recommended between the analog and

digital supply lines, with a ceramic capacitor close to the

analog supply pin.

The converter digital supply should not be the supply that is

used for other digital circuitry on the board. It should be the

same supply used for the ADC10321 analog supply.

As is the case with all high speed converters, the ADC10321

should be assumed to have little high frequency power sup-

ply rejection. A clean analog power source should be used.

No pin should ever have a voltage on it that is in excess of

the supply voltages or below ground, not even on a transient

basis. This can be a problem upon application of power to a

circuit. Be sure that the supplies to circuits driving the CLK,

PD, OE, analog input and reference pins do not come up any

faster than does the voltage at the ADC10321 power pins.

4.0 THE ADC10321 CLOCK

Although the ADC10321 is tested and its performance is

guaranteed with a 20MHz clock, it typically will function with

clock frequencies from 1MHz to 25MHz. Performance is best

if the clock rise and fall times are 5ns or less and if the clock

line is terminated with a series RC of about 100 Ohms and

47pF near the clock input pin, as shown in

Figure 6.

5.0 LAYOUT AND GROUNDING

Proper routing of all signals and proper ground techniques

are essential to ensure accurate conversion. Separate ana-

log and digital ground planes are required to meet data sheet

limits. The analog ground plane should be low impedance

and free of noise form other parts of the system.

Each bypass capacitor should be located as close to the ap-

propriate converter pin as possible and connected to the pin

and the appropriate ground plane with short traces. The ana-

log input should be isolated from noisy signal traces to avoid

coupling of spurious signals into the input. Any external com-

DS100897-20

FIGURE 6. Setting precision reference voltages

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