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PDRV5013FAQDBZR 数据表(PDF) 13 Page - Texas Instruments |
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PDRV5013FAQDBZR 数据表(HTML) 13 Page - Texas Instruments |
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13 / 28 page ![]() ref ref V max V min R1 30 mA 100 µA d d VCC BOP BRP t (s) B (mT) t (s) t (s) OUT Valid Output td ton 13 DRV5013 www.ti.com SLIS150E – MARCH 2014 – REVISED FEBRUARY 2016 Product Folder Links: DRV5013 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Feature Description (continued) Figure 16. Case 4: Power On When BRP < B < BOP, Followed by B < BRP 7.3.4 Output Stage The DRV5013 output stage uses an open-drain NMOS, and it is rated to sink up to 30 mA of current. For proper operation, calculate the value of the pullup resistor R1 using Equation 1. (1) The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching. In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT pin close to GND. NOTE Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the Absolute Maximum Ratings. |
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