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CD4013 数据表(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 CD4013
功能描述  Dual D Flip-Flop
PDF  6 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

CD4013 数据表(HTML) 3 Page - National Semiconductor (TI)

  CD4013 Datasheet HTML 1Page - National Semiconductor (TI) CD4013 Datasheet HTML 2Page - National Semiconductor (TI) CD4013 Datasheet HTML 3Page - National Semiconductor (TI) CD4013 Datasheet HTML 4Page - National Semiconductor (TI) CD4013 Datasheet HTML 5Page - National Semiconductor (TI) CD4013 Datasheet HTML 6Page - National Semiconductor (TI)  
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DC Electrical Characteristics CD4013BC (Note 2) (Continued)
Symbol
Parameter
Conditions
b
40 C
a
25 C
a
85 C
Units
Min
Max
Min
Typ
Max
Min
Max
VIH
High Level
lIOl k 10 mA
Input Voltage
VDD e 5V VO e 05V or 45V
35
35
35
V
VDD e 10V VO e 10V or 90V
70
70
70
V
VDD e 15V VO e 15V or 135V
110
110
110
V
IOL
Low Level Output
VDD e 5V VO e 04V
052
044
088
036
mA
Current (Note 3)
VDD e 10V VO e 05V
13
11
225
09
mA
VDD e 15V VO e 15V
36
30
88
24
mA
IOH
High Level Output
VDD e 5V VO e 46V
b
052
b
044
b
088
b
036
mA
Current (Note 3)
VDD e 10V VO e 95V
b
13
b
11
b
225
b
09
mA
VDD e 15V VO e 135V
b
36
b
30
b
88
b
24
mA
IIN
Input Current
VDD e 15V VIN e 0V
b
03
b
10b5
b
03
b
10
m
A
VDD e 15V VIN e 15V
03
10b5
03
10
m
A
Note 1
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices
should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation
Note 2
VSS e 0V unless otherwise specified
Note 3
IOH and IOL are measured one output at a time
AC Electrical Characteristics TA e 25 C CL e 50 pF RL e 200k unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CLOCK OPERATION
tPHL tPLH
Propagation Delay Time
VDD e 5V
200
350
ns
VDD e 10V
80
160
ns
VDD e 15V
65
120
ns
tTHL tTLH
Transition Time
VDD e 5V
100
200
ns
VDD e 10V
50
100
ns
VDD e 15V
40
80
ns
tWL tWH
Minimum Clock
VDD e 5V
100
200
ns
Pulse Width
VDD e 10V
40
80
ns
VDD e 15V
32
65
ns
tRCL tFCL
Maximum Clock Rise and
VDD e 5V
15
m
s
Fall Time
VDD e 10V
10
m
s
VDD e 15V
5
m
s
tSU
Minimum Set-Up Time
VDD e 5V
20
40
ns
VDD e 10V
15
30
ns
VDD e 15V
12
25
ns
fCL
Maximum Clock
VDD e 5V
25
5
MHz
Frequency
VDD e 10V
62
125
MHz
VDD e 15V
76
155
MHz
SET AND RESET OPERATION
tPHL(R)
Propagation Delay Time
VDD e 5V
150
300
ns
tPLH(S)
VDD e 10V
65
130
ns
VDD e 15V
45
90
ns
tWH(R)
Minimum Set and
VDD e 5V
90
180
ns
tWH(S)
Reset Pulse Width
VDD e 10V
40
80
ns
VDD e 15V
25
50
ns
CIN
Average Input Capacitance
Any Input
5
75
pF
AC Parameters are guaranteed by DC correlated testing
3



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