PI7C9X9208 datasheet(9/53 Pages) PERICOM

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PI7VD9004ABH

Adaptive EQ 4-channel 960H Video Decoder

Pericom Semiconductor Corporation

www.pericom.com

3 Pin-out Information

Analog Video/Audio Interface

Pin Name

Pin Number

TypeDescription

CV_INA0,

CV_INB0,

CV_INA1,

CV_INB1,

CV_INA2,

CV_INB2,

CV_INA3,

CV_INB3

110,

111,

113,

114,

116,

117,

119,

120

Analog

CVBS input A of Video channel 0

CVBS input B of Video channel 0

CVBS input A of Video channel 1

CVBS input B of Video channel 1

CVBS input A of Video channel 2

CVBS input B of Video channel 2

CVBS input A of Video channel 3

CVBS input B of Video channel 3

VCM

102

Analog

Connect to an external capacitor

LINE_IN0,

LINE_IN1,

LINE_IN2,

LINE_IN3,

LINE_IN4

103,

104,

105,

106,

107

Analog

Line input of Audio channel 0

Line input of Audio channel 1

Line input of Audio channel 2

Line input of Audio channel 3

Line input of Audio channel 4

LINE_OUT

Analog

Mixed Analog Audio Output

Digital Video/Audio Interface

Pin Name

Pin Number

TypeDescription

PIXOUT_0[7:0]

63, 64, 65,

66,68,69,

70,71

Output

Bt.656 Time Multiplex Division output of port 0

PIXOUT_1[7:0]

50, 51, 52, 53,

56,57,58,59

Output

Bt.656 Time Multiplex Division output of port 1

PIXOUT_2[7:0]

30, 31, 32, 33,

36, 37, 38, 39

Output

Bt.656 Time Multiplex Division output of port 2

PIXOUT_3[7:0]

16, 17, 18, 19, 22,

23, 24, 25

Output

Bt.656 Time Multiplex Division output of port 3

GPIO_0

Output

According to register setting, it outputs GPO, HSYC,

VSYNC, FDFLAG, ACTIVE and VDLOSS of channel 0

GPIO_1

Output

According to register setting, it outputs GPO, HSYC,

VSYNC, FDFLAG, ACTIVE and VDLOSS of channel 1

GPIO_2

Output

According to register setting, it outputs GPO, HSYC,

VSYNC, FDFLAG, ACTIVE and VDLOSS of channel 2

GPIO_3

Output

According to register setting, it outputs GPO, HSYC,

VSYNC, FDFLAG, ACTIVE and VDLOSS of channel 3

SCLK_R

Input/

Output

Record audio serial clock. It is an input pin under slave

mode, while output pin under master mode.

LRCK_R

Input/

Output

Record audio serial sync pulse. It is an input pin under slave

mode, while output pin under master mode.

SDOUT_R

Output

Record audio serial data output.

SDOUT_M

Output

Mixing audio serial data output.

SCLK_P

Input/

Output

Playback audio serial clock. It is an input pin under slave

mode, while output pin under master mode

13-0174

PI7C9X9208 数据表(PDF) 9 Page - Pericom Semiconductor Corporation

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PI7C9X9208 数据表(PDF) 9 Page - Pericom Semiconductor Corporation

PI7C9X9208 数据表(HTML) 9 Page - Pericom Semiconductor Corporation

Html Pages

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数据表 下载

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