Functional Description

On the multiplexed clock device the SEL pin is used to

determine which CLKn input will have an active effect on

The non-selected CLKn input will not have any effect on the

logical output level of the circuit The output pins act as a

single entity and will follow the state of the CLK or

CLK1CLK0 pins when either the multiplexed (’2526) or the

straight (’2525) clock distribution chip is selected

Pin Description

Pin Names

Description

CLK

Clock Input (’2525)

CLK0 CLK1

Clock Inputs (’2526)

Outputs

SEL

Clock Select (’2526)

Truth Tables

’2525

Inputs

Outputs

CLK

LL

HH

’2526

Inputs

Outputs

CLK0

CLK1

SEL

LX

L

L

HX

L

H

XL

H

L

XH

H

H

’2525

TLF10684 – 7

’2526

TLF10684 – 8

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