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DS2143 数据表(PDF) 21 Page - Dallas Semiconductor |
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DS2143 数据表(HTML) 21 Page - Dallas Semiconductor |
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21 / 44 page ![]() DS2143/DS2143Q 21 of 44 IMR2: INTERRUPT MASK REGISTER 2 (Address=17 Hex) (MSB) (LSB) RMF RAF TMF SEC TAF LOTC RCMF LORC SYMBOL POSITION NAME AND DESCRIPTION RMF IMR2.7 Receive CAS Multiframe. 0 = interrupt masked. 1 = interrupt enabled. RAF IMR2.6 Receive Align Frame. 0 = interrupt masked. 1 = interrupt enabled. TMF IMR2.5 Transmit Multiframe. 0 = interrupt masked. 1 = interrupt enabled. SEC IMR2.4 1-Second Timer. 0 = interrupt masked. 1 = interrupt enabled. TAF IMR2.3 Transmit Align Frame. 0 = interrupt masked. 1 = interrupt enabled. LOTC IMR2.2 Loss Of Transmit Clock. 0 = interrupt masked. 1 = interrupt enabled. RCMF IMR2.1 Receive CRC4 Multiframe. 0 = interrupt masked. 1 = interrupt enabled. LORC IMR2.0 Loss of Receive Clock. 0 = interrupt masked. 1 = interrupt enabled. 5.0 ERROR COUNT REGISTERS There are a set of three counters in the DS2143 that record bipolar violations, errors in the CRC4 SMF code words, and E-bits as reported by the far end. Each of these three counters are automatically updated on 1-second boundaries as determined by the 1-second timer in Status Register 2 (SR2.4). Hence, these registers contain performance data from the previous second. The user can use the interrupt from the 1- second timer to determine when to read these registers. The user has a full second to read the counters before the data is lost. |
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