Pin Description

Pin Name I/O

Internal

Connection

Description

A0~A11

I

TRANSMISSION

GATE

Input pins for address A0~A11 setting

They can be externally set to VDD, VSS, or left open.

AD10~AD17

I

TRANSMISSION

GATE

Input pins for address/data (AD10~AD17) setting

They can be externally set to VDD, VSS, or left open.

D12~D17

I

CMOS IN

Pull-low

Input pins for data (D12~D17) setting and transmission

enable (active high)

They an be externally set to VDD or left open (see Note).

DOUT

O

CMOS OUT

Encoder data serial transmission output

LED

O

NMOS OUT

LED transmission enable indicator

TE

I

CMOS IN

Pull-low

Transmission enable, active high (see Note).

OSC1

I

OSCILLATOR

Oscillator input pin

OSC2

O

OSCILLATOR

Oscillator output pin

VSS

I

¾

Negative power supply (GND)

VDD

I

¾

Positive power supply

Notes: D12~D17 are data input and transmission enable pins of the HT6187/HT6207/HT6247.

TE is the transmission enable pin of the HT600/HT640/HT680.

3

July 8, 1999

DAT A t r i g g e r t y p e

9 - A d d r ess

3 - D a t a

10- A d d r ess

4 - D a t a

H T 6207

2 0 D I P/ SO P

H T 6187

18 D I P

9 - A d d r e s s

3 - D a t a

H T 6187

20 S O P

12- A d d r e ss

6 - D a t a

H T 6247

2 4 SO P/ SD I P

A1 1

D1 2

D1 4

D1 5

DO UT

LE D

OS C 2

OS C 1

VS S

A9

A8

A7

A6

A3

A2

A1

A0

18

17

16

15

14

13

12

11

10

1

2

3

4

5

6

7

8

9

NC

A1 1

D1 2

D1 4

D1 5

DO UT

LE D

OS C 2

OS C 1

VS S

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

NC

VD D

A9

A8

A7

A6

A3

A2

A1

A0

A1 1

D1 2

D1 3

D1 4

D1 5

DO UT

LE D

OS C 2

OS C 1

VS S

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

VD D

A9

A8

A7

A6

A4

A3

A2

A1

A0

A1 1

D1 2

D1 3

D1 4

D1 5

D1 6

D1 7

DO UT

LE D

OS C 2

OS C 1

VS S

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VD D

A1 0

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

VD D