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CLC430 数据表(PDF) 5 Page - National Semiconductor (TI) |
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CLC430 数据表(HTML) 5 Page - National Semiconductor (TI) |
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5 / 8 page ![]() General Design Considerations The CLC430 is a general purpose current-feedback ampli- fier for use in a variety of small- and large-signal applica- tions. Use the feedback resistor to fine tune the gain flatness and -3dB bandwidth for any gain setting. Com- linear provides information for the performance at a gain of +2 for small and large signal bandwidths. The plots show feedback resistor values for selected gains. Gain Use the following equations to set the CLC430's non- inverting or inverting gain: Non -Inverting Gain = 1+ R R f g Inverting Gain = - R R f g Choose the resistor values for non-inverting or inverting gain by the following steps. Vin Vout Rf Rg Rs Rin CLC430 + - Fig. 0 Component Identification 1) Select the recommended feedback resistor Rf (refer to plot in the plot section entitled Rf vs Gain). 2) Choose the value of Rg to set gain. 3) Select Rs to set the circuit output impedance. 4) Select Rin for input impedance and input bias. High Gains Current feedback closed-loop bandwidth is independent of gain-bandwidth-product for small gain changes. For larger gain changes the optimum feedback register R f is derived by the following: As gain is increased, the feedback resistor allows bandwidth to be held constant over a wide gain range. For a more complete explanation refer to application note OA-25 Stabil- ity Analysis of Current-Feedback Amplifiers. Resistors have varying parasitics that affect circuit perfor- mance in high-speed design. For best results, use leaded metal-film resistors or surface mount resistors. A SPICE model for the CLC430 is available to simulate overall circuit performance. Enable / Disable Function The CLC430 amplifier features an enable/disable function that changes the output and inverting input from low to high impedance. The pin 8 enable/disable logic levels are as follows: Vcc ±15V ±5V Enable >12.7V >2.7V Disable <10.0V <0.8V The amplifier is enabled with pin 8 left open due to the 2k Ω pull-up resistor, shown in Fig. 1. To CLC430 Bias network 2k Ω +Vcc Pin 8 DISABLE 8k Ω -Vcc Fig. 1 Pin 8 Equivalent Disable Circuit Open-collector or CMOS interfaces are recommended to drive pin 8. The turn-on and off time depends on the speed of the digital interface. The equivalent output impedance when disabled is shown in Fig. 2. With Rg connected to ground, the sum of Rf and Rg dominates and reduces the disabled output imped- ance. To raise the output impedance in the disabled state, connect the CLC430 as a unity-gain voltage follower by removing Rg. Current-feedback op-amps need the recom- mended Rf in a unity-gain follower circuit. For high density circuit layouts consider using the dual CLC431 (with disable) or the dual CLC432 (without disable). Equivalent Impedance in Disable Rf Vout Rg Vin 300k Ω 8pF + - Fig. 2 Equivalent Disabled Output Impedance 2nd and 3rd Harmonic Distortion To meet low distortion requirements, recognize the effect of the feedback resistor. Increasing the feedback resistor will decrease the loop gain and increase distortion. De- creasing the load impedance increases 3rd harmonic distortion more than 2nd. Differential Gain and Differential Phase The CLC430 has low DG and DP errors for video applica- tions. Add an external pulldown resistor to the CLC430’s output to improve DG and DP as seen in Fig.3. A 604 ΩR P will improve DG and DP to 0.01% and 0.02°. 5 http://www.national.com RA f v =− ⋅ () 724 60 ΩΩ |
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