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CLC436 数据表(PDF) 2 Page - National Semiconductor (TI) |
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CLC436 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 6 page ![]() PARAMETERS CONDITIONS Vcc TYP MIN/MAX RATINGS UNITS NOTES CLC436AJ 25° 25° 0° to +70° -40° to +85° FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vout < 0.5Vpp (AJP) ±15, ±5 96,55 50 50 50 MHz B Vout < 0.5Vpp (AJE) ±15, ±5 96,55 50 60 40 MHz B Vout < 10Vpp 25 21 20 16 MHz -3dB bandwidth AV = +1 Vout < 0.5Vpp, Rf = 0 ±15, ±5 200,150 MHz gain flatness Vout < 0.5Vpp rolloff DC to 20MHz 0.6 1.2 1.2 1.2 dB B peaking DC to 10MHz 0 0.03 0.03 0.03 dB B linear phase deviation DC to 10MHz 0.5 deg differential gain 4.43MHz, RL=150Ω 0.2 % differential phase 4.43MHz, RL=150Ω 1.2 deg gain bandwidth product Vout < 2.0Vpp ±15, ±5 200,100 MHz TIME DOMAIN RESPONSE rise and fall time 2V step, tr(in) = 5ns 11 13 14 18 ns 5V step, tr(in) = 5ns 13 16 18 20 ns settling time to 0.05% 2V step, tr(in) = 5ns ±15, ±5 36,48 42 65 85 ns overshoot 2V step, tr(in) = 5ns 0.5 1 2 2 % slew rate 5V step, tr(in) = 5ns ±15, ±5 2400,850 2000 1900 1600 V/ µs DISTORTION AND NOISE RESPONSE 2nd harmonic distortion 1Vpp, 1MHz -72 -65 -62 -62 dBc 3rd harmonic distortion 1Vpp, 1MHz -70 -62 -60 -60 dBc 2nd harmonic distortion 1Vpp, 5MHz -65 -56 -56 -53 dBc B 3rd harmonic distortion 1Vpp, 5MHz -63 -54 -54 -54 dBc B input voltage noise @1kHz 11 12.6 13.5 14.1 nV/ √Hz current noise @1kHz 0.8 1.5 1.9 2.3 pA/ √Hz STATIC DC PERFORMANCE input offset voltage ±15, ±5 1.5,1.5 5 5 5 mV A average drift 6 – 40 70 µV/˚C input bias current ±15, ±5 1,1.2 3 3 4 µAA average drift 4 – 50 70 nA/˚C input offset current ±15, ±5 0.1,0.1 1 1 3 µAA power supply rejection ratio DC 95 75 75 75 dB B common-mode rejection ratio DC 110 75 73 70 dB supply current RL= ∞ 2.3 4 4 4 mA A open loop gain ±15, ±5 85,80 dB MISCELLANEOUS PERFORMANCE input resistance common-mode 40 20 15 10 M Ω input capacitance common-mode 2 3 3 5 pF input resistance differential-mode 4.9 4.0 3.0 2.5 M Ω input voltage range common-mode ±15 ±12 ±11 ±10.5 ±10 V input voltage range common-mode ±5 ±3 V output voltage range RL = 100Ω ±15 +11.6/-10.5 +8.5/-8.5 +8.5/-8.5 +8.5/-8.5 V RL = ∞ ±15 +13/-12.2 +12/-12 +12/-12 +12/-12 V output voltage range RL = 100Ω ±5 ±2.8 V RL = ∞ ±5 ±3.4 V output resistance, closed loop 0.01 0.05 0.07 0.1 Ω output current sourcing ±15, ±5 120,90 100 95 90 mA output current sinking ±15, ±5 80,40 75 70 65 mA CLC436 Electrical Characteristics (Vcc = ±15V, Av = +2, R f = 499W, RL = 1kW; unless specified) Absolute Maximum Ratings supply voltage ±18.0V maximum junction temperature +150˚C storage temperature range -65˚C to +150˚C lead temperature (soldering 10 sec) +260˚C Ordering Information Model Temperature Range Description CLC436AJP -40˚C to +85˚C 8-pin PDIP CLC436AJE -40˚C to +85˚C 8-pin SOIC Notes A) J-level: spec is 100% tested at +25˚C, sample tested at +85˚C. B) J-level: spec is sample tested at +25˚C. Package Thermal Resistance Package θ JC θ JA Plastic (AJP) 90°C/W 105°C/W Surface Mount (AJE) 120°C/W 140°C/W http://www.national.com 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. |
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