PIC16F877AISLASHML datasheet(56/234 Pages) MICROCHIP

56 / 234 page

PIC16F87XA

DS39582B-page 54

 2003 Microchip Technology Inc.

5.2

Using Timer0 with an External

Clock

When no prescaler is used, the external clock input is

the same as the prescaler output. The synchronization

of T0CKI with the internal phase clocks is accom-

plished by sampling the prescaler output on the Q2 and

Q4 cycles of the internal phase clocks. Therefore, it is

necessary for T0CKI to be high for at least 2 TOSC (and

a small RC delay of 20 ns) and low for at least 2 TOSC

(and a small RC delay of 20 ns). Refer to the electrical

specification of the desired device.

5.3

Prescaler

There is only one prescaler available which is mutually

exclusively shared between the Timer0 module and the

Watchdog Timer. A prescaler assignment for the

Timer0 module means that there is no prescaler for the

Watchdog Timer and vice versa. This prescaler is not

readable or writable (see Figure 5-1).

The PSA and PS2:PS0 bits (OPTION_REG<3:0>)

determine the prescaler assignment and prescale ratio.

When assigned to the Timer0 module, all instructions

writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,

BSF 1,x

....etc.) will clear the prescaler. When assigned

to WDT, a CLRWDT instruction will clear the prescaler

along with the Watchdog Timer. The prescaler is not

readable or writable.

OPTION_REG REGISTER

Note:

Writing to TMR0 when the prescaler is

assigned to Timer0 will clear the prescaler

count, but will not change the prescaler

assignment.

R/W-1

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

bit 7

RBPU

bit 6

INTEDG

bit 5

T0CS: TMR0 Clock Source Select bit

= Transition on T0CKI pin

= Internal instruction cycle clock (CLKO)

bit 4

T0SE: TMR0 Source Edge Select bit

= Increment on high-to-low transition on T0CKI pin

= Increment on low-to-high transition on T0CKI pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is assigned to the WDT

= Prescaler is assigned to the Timer0 module

bit 2-0

PS2:PS0: Prescaler Rate Select bits

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

Note:

To avoid an unintended device Reset, the instruction sequence shown in the

PICmicro® Mid-Range MCU Family Reference Manual (DS33023) must be exe-

cuted when changing the prescaler assignment from Timer0 to the WDT. This

sequence must be followed even if the WDT is disabled.

000

001

010

011

100

101

110

111

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

Bit Value TMR0 Rate WDT Rate

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