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CLC533 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 CLC533
功能描述  High-Speed 4:1 Analog Multiplexer
PDF  9 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

CLC533 数据表(HTML) 2 Page - National Semiconductor (TI)

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PARAMETERS
CONDITIONS
TYP
MIN/MAX RATINGS2
UNITS
SYMBOL
Ambient Temperature
CLC533AJP/AJE/AIB
+25°C
-40°C
+25°C
+85°C
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
VOUT < 0.1Vpp
180
130
130
110
MHz
SSBW
-3dB bandwidth
VOUT = 2Vpp
45
35
35
30
MHz
LSBW
gain flatness
VOUT < 0.1Vpp
peaking
0.1MHz to 200MHz
0.2
0.5
0.5
0.5
dB
GFP
rolloff
0.1MHz to 100MHz
1.0
2.0
2.0
3.0
dB
GFR
linear phase deviation
dc to 100MHz
2.0
deg
LPD
crosstalk rejection - 1 channel
2Vpp, 10MHz
80
74
74
74
dB
CT10
2Vpp, 20MHz
74
68
68
68
dB
CT20
2Vpp, 30MHz
68
62
62
62
dB
CT30
crosstalk rejection - 3 channels
2Vpp, 10MHz
80
74
74
74
dB
3CT10
2Vpp, 20MHz
74
68
68
68
dB
3CT20
2Vpp, 30MHz
68
62
62
62
dB
3CT30
TIME DOMAIN PERFORMANCE
rise and fall time
0.5V step
2.7
3.3
3.3
3.8
ns
TRS
2V step
10
12.5
12.5
14.5
ns
TRL
settling time2
2V step
±0.01%
17
24
24
27
ns
TSP
±0.1%
13
18
18
21
ns
TSS
overshoot
2.0V step
2
5
5
6
%
OS
slew rate
160
130
130
110
V/
µsSR
SWITCH PERFORMANCE
channel to channel switching time
50% SELECT to 10%VOUT
6
8
8
9
ns
SWT10
(2V step at output)
50% SELECT to 90%VOUT
16
21
21
24
ns
SWT90
switching transient
30
mV
ST
DISTORTION AND NOISE PERFORMANCE
2nd harmonic distortion
2Vpp, 5MHz
80
67
67
67
dBc
HD2
3rd harmonic distortion
2Vpp, 5MHz
86
67
67
67
dBc
HD3
equivalent input noise
spot noise voltage
> 1MHz
4.2
nV/
√Hz
SNF
integrated noise
1MHz to 100MHz
42
54
51
mVrms
INV
spot noise current
5
pA/
√Hz
SNF
STATIC AND DC PERFORMANCE
* analog output offset
1
12
3.5
4.5
mV
VOS
temperature coefficient
15
90
20
µV/°C
DVIO
* analog input bias current
50
280
120
120
µA
IBN
temperature coefficient
0.3
2.0
0.8
µA/°C
DIBN
analog input resistance
200
90
120
120
k
RIN
analog input capacitance
2
3.0
2.5
2.5
pF
CIN
* gain accuracy
±2V
0.994
0.988
0.988
0.988
V/V
GA
integral endpoint linearity
±1V (full scale)
0.02
0.05
0.03
0.03
%FS
ILIN
output voltage
no load
±3.4
2.4
2.8
2.8
V
VO
output current
45
20
50
50
mA
IO
output resistance
DC
1.5
4.0
2.5
2.5
RO
DIGITAL INPUT PERFORMANCE
ECL mode (DREF floating)
input voltage logic HIGH
-1.1
-1.1
-1.1
V
VIH1
input voltage logic LOW
-1.5
-1.5
-1.5
V
VIL1
input current logic HIGH
200
220
80
80
µA
IIH1
input current logic LOW
200
220
80
80
µA
IIL1
TTL mode (DREF = +5V)
input voltage logic HIGH
2.0
2.0
2.0
V
VIH2
input voltage logic LOW
0.8
0.8
0.8
V
VIL2
input current logic HIGH
200
220
80
80
µA
IIH2
input current logic LOW
200
220
80
80
µA
IIL2
POWER REQUIREMENTS
* supply current (+VCC = +5.0V)
no load
28
38
36
36
mA
ICC
* supply current (-Vee = -5.2V)
no load
28.5
39
37
37
mA
IEE
nominal power dissipation
no load
288
mW
PD
* power supply rejection ratio
-53
-60
-60
dB
PSRR
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
CLC533 Electrical Characteristics (+V
cc = +5.0V; -Vee = -5.2V; Rin = 50Ω;RL = 500Ω;CCOMP = 8pf; ECL Mode, pin 13 = NC)



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