cific frequency (measured with a 1Hz bandwidth). This type

of noise is usually plotted on a curve as a function of fre-

quency.

Total output Noise or Broad-band noise is the RMS sum

of spot noise over a specified bandwidth, usually several

decades of frequencies.

Attention should be paid to the units of measurement. Spot

noise is measured in units µV/

noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the

internal reference. In CMOS regulators, noise has a low

frequency component and a high frequency component,

which depend strongly on the silicon area and quiescent

current. Noise can be reduced in two ways: by increasing the

transistor area or by increasing the current drawn by the

internal reference. Increasing the area will decrease the

chance of fitting the die into a smaller package. Increasing

the current drawn by the internal reference increases the

total supply current (ground pin current). Using an optimized

trade-off of ground pin current and die size, LP3853/LP3856

achieves low noise performance and low quiescent current

operation.

The total output noise specification for LP3853/LP3856 is

presented in the Electrical Characteristics table. The Output

noise density at different frequencies is represented by a

curve under typical performance characteristics.

SHORT-CIRCUIT PROTECTION

The LP3853 and LP3856 are short circuit protected and in

the event of a peak over-current condition, the short-circuit

control loop will rapidly drive the output PMOS pass element

off. Once the power pass element shuts down, the control

loop will rapidly cycle the output on and off until the average

power dissipation causes the thermal shutdown circuit to

respond to servo the on/off cycling to a lower frequency.

Please refer to the section on thermal information for power

dissipation calculations.

ERROR FLAG OPERATION

The LP3853/LP3856 produces a logic low signal at the Error

Flag pin when the output drops out of regulation due to low

input voltage, current limiting, or thermal limiting. This flag

has a built in hysteresis. The timing diagram in Figure 3

shows the relationship between the ERROR flag and the

output voltage. In this example, the input voltage is changed

to demonstrate the functionality of the Error Flag.

The internal Error flag comparator has an open drain output

stage. Hence, the ERROR pin should be pulled high through

a pull up resistor. Although the ERROR flag pin can sink

current of 1mA, this current is energy drain from the input

supply. Hence, the value of the pull up resistor should be in

the range of 10k

Ω to 1MΩ. The ERROR pin must be

connected to ground if this function is not used. It should

also be noted that when the shutdown pin is pulled low, the

ERROR pin is forced to be invalid for reasons of saving

power in shutdown mode.

SENSE PIN

In applications where the regulator output is not very close to

the load, LP3856 can provide better remote load regulation

using the SENSE pin. Figure 4 depicts the advantage of the

SENSE option. LP3853 regulates the voltage at the output

pin. Hence, the voltage at the remote load will be the regu-

lator output voltage minus the drop across the trace resis-

tance. For example, in the case of a 3.3V output, if the trace

resistance is 100m

Ω, the voltage at the remote load will be

3V with 3A of load current, I

voltage at the sense pin. Connecting the sense pin to the

20030907

FIGURE 3. Error Flag Operation

www.national.com

13