CPC7592 datasheet(7/19 Pages) IXYS

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INTEGRATED CIRCUITS DIVISION

CPC7592

R04

www.ixysic.com

1.6.4 Test Switches, SW5 and SW6

Parameter

Test Conditions

Symbol

Minimum

Typical

Maximum

Unit

Off-State

Leakage Current

VSW1 (differential) = TLINE to TBAT

VSW2 (differential) = RLINE to RBAT

All-Off state.

+25

 C,

VSW (differential) = -320 V to gnd

VSW (differential) = +260 V to -60 V

ISW

0.1

A

+85

 C,

VSW (differential) = -330 V to gnd

VSW (differential) = +270 V to -60 V

0.3

-40

 C,

VSW (differential) = -310 V to gnd

VSW (differential) = +250 V to -60 V

0.1

On Resistance

ISW(on) = ±10 mA, ±40 mA,

RBAT and TBAT = -2 V

+25

 C

RON



+85

 C46

-40

 C28

DC current limit

VSW (on) = ±10 V, +25 C

ISW

175

VSW (on) = ±10 V, +85 C

110

VSW (on) = ±10 V, -40 C

210

250

Dynamic current limit

(t = <0.5

s)

Break switches on, all other switches

off. Apply ±1 kV 10x1000

s pulse with

appropriate protection in place.

ISW

-2.5

Logic input to switch

output isolation

+25

 C, Logic inputs = gnd,

VSW (TLINE, RLINE) = ±320 V

ISW

-0.1

A

+85

 C, Logic inputs = gnd,

VSW (TLINE, RLINE) = ±330 V

-0.3

-40

 C, Logic inputs = gnd,

VSW (TLINE, RLINE) = ±310 V

-0.1

dV/dt sensitivity

500

s

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