TLF6533

July 1992

DM5490DM7490A DM7493A

Decade and Binary Counters

General Description

Each of these monolithic counters contains four master-

slave flip-flops and additional gating to provide a divide-by-

two counter and a three-stage binary counter for which the

count cycle length is divide-by-five for the 90A and divide-

by-eight for the 93A

All of these counters have a gated zero reset and the 90A

also has gated set-to-nine inputs for use in BCD nine’s com-

plement applications

To use their maximum count length (decade or four-bit bina-

count pulses are applied to input A and the outputs are as

described in the appropriate truth table A symmetrical di-

vide-by-ten count can be obtained from the 90A counters by

input count to the B input which gives a divide-by-ten square

Features

Y

Typical power dissipation

90A

145 mW

93A

130 mW

Y

Count frequency 42 MHz

Connection Diagrams

Dual-In-Line Package

TLF6533 – 1

Order Number DM5490J DM5490W or DM7490AN

See NS Package Number J14A N14A or W14B

Dual-In-Line Package

TLF6533 – 2

Order Number DM7493AN

See NS Package Number N14A

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A