B-6

01/99

2N3957, 2N3958

N-Channel Dual Silicon Junction Field-Effect Transistor

¥ Low and Medium Frequency

Differential Amplifiers

¥ High Input Impedance

Amplifiers

Reverse Gate Source & Reverse Gate Drain Voltage

– 50 V

Gate Current

50 mA

Total Device Power Dissipation (each side)

250 mW

@ 85°C Case Temperature (both sides)

500 mW

Power Derating (both sides)

4.3 mW/°C

TOÐ71 Package

See Section G for Outline Dimensions

Pin Configuration

1 Source, 2 Drain, 3 Gate, 5 Source,

6 Drain, 7 Gate

At 25°C free air temperature:

2N3957

2N3958

Process NJ16

Static Electrical Characteristics

Min

Max

Min

Max

Unit

Test Conditions

Gate Source Breakdown Voltage

– 50

– 50

V

Gate Reverse Current

– 100

– 100

pA

– 500

– 500

nA

Gate Operating Current

– 50

– 50

pA

– 250

– 250

nA

Gate Source Voltage

– 4.2

– 4.2

V

– 0.5

– 4

– 0.5

– 4

V

Gate Source Cutoff Voltage

– 1

– 4.5

– 1

– 4.5

V

Gate Source Forward Voltage

22

V

Drain Saturation Current (Pulsed)

0.5

5

0.5

5

mA

Dynamic Electrical Characteristics

Common Source

1000 3000 1000 3000

µS

f = 1 kHz

Forward Transconductance

1000

1000

µS

f = 200 MHz

Common Source Output Conductance

35

35

µS

f = 1 kHz

Common Source Input Capacitance

44

pF

f = 1 MHz

Drain Gate Capacitance

1.5

1.5

pF

f = 1 MHz

Common Source

1.2

1.2

pF

f = 1 MHz

Reverse Transfer Capacitance

Noise Figure

NF

0.5

0.5

dB

f = 100 Hz

Differential Gate Current

10

nA

Saturation Drain Current Ratio

1

0.85

1

Differential Gate Source Voltage

20

25

mV

Differential Gate Source

68

mV

to – 55°C

Voltage with Temperature

∆T

7.5

10

mV

to 125°C

Transconductance Ratio

0.9

1

0.85

1

f = 1 kHz

1000 N. Shiloh Road, Garland, TX 75042

www.interfet.com

Databook.fxp

1/14/99 11:30 AM

Page B-6