TLF6394

May 1989

DM54LS154DM74LS154 4-Line to 16-Line

DecodersDemultiplexers

General Description

Each of these 4-line-to-16-line decoders utilizes TTL circuit-

ry to decode four binary-coded inputs into one of sixteen

mutually exclusive outputs when both the strobe inputs G1

and G2 are low The demultiplexing function is performed

by using the 4 input lines to address the output line passing

data from one of the strobe inputs with the other strobe

input low When either strobe input is high all outputs are

high These demultiplexers are ideally suited for implement-

ing high-performance memory decoders All inputs are buff-

ered and input clamping diodes are provided to minimize

transmission-line effects and thereby simplify system de-

sign

Features

Y

Decodes 4 binary-coded inputs into one of 16 mutually

exclusive outputs

Y

Performs the demultiplexing function by distributing data

from one input line to any one of 16 outputs

Y

Input clamping diodes simplify system design

Y

High fan-out low-impedance totem-pole outputs

Y

Typical propagation delay

3 levels of logic 23 ns

Strobe 19 ns

Y

Typical power dissipation 45 mW

Connection and Logic Diagrams

Dual-In-Line Package

TLF6394 – 1

Order Number DM54LS154J

DM74LS154WM or DM74LS154N

See NS Package Number J24A M24B or N24A

TLF6394 – 2

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A