ADR433A datasheet(15/24 Pages) AD

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ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

Rev. B | Page 15 of 24

THEORY OF OPERATION

The ADR43x series of references uses a new reference generation

technique known as XFET (eXtra implanted junction FET).

This technique yields a reference with low supply current, good

thermal hysteresis, and exceptionally low noise. The core of the

XFET reference consists of two junction field-effect transistors

(JFETs), one of which has an extra channel implant to raise its

pinch-off voltage. By running the two JFETs at the same drain

current, the difference in pinch-off voltage can be amplified and

used to form a highly stable voltage reference.

The intrinsic reference voltage is around 0.5 V with a negative

temperature coefficient of about –120 ppm/°C. This slope is

essentially constant to the dielectric constant of silicon and can

be closely compensated by adding a correction term generated

in the same fashion as the proportional-to-temperature (PTAT)

term used to compensate band gap references. The big advantage

of an XFET reference is that the correction term is some 30 times

lower (therefore, requiring less correction) than for a band gap

reference, resulting in much lower noise, because most of the

noise of a band gap reference comes from the temperature

compensation circuitry.

Figure 29 shows the basic topology of the ADR43x series. The

temperature correction term is provided by a current source

with a value designed to be proportional to absolute temperature.

The general equation is

(

)

PTAT

OUT

−

(1)

where:

G is the gain of the reciprocal of the divider ratio.

∆VP is the difference in pinch-off voltage between the two JFETs.

IPTAT is the positive temperature coefficient correction current.

ADR43x devices are created by on-chip adjustment of R2 and

R3 to achieve 2.048 V or 2.500 V, respectively, at the reference

output.

IPTAT

*EXTRA CHANNEL IMPLANT

VOUT = G(∆VP –R1 × IPTAT)

VIN

VOUT

GND

∆VP

ADR43x

Figure 29. Simplified Schematic Device

Power Dissipation Considerations

The ADR43x family of references is guaranteed to deliver load

currents to 10 mA with an input voltage that ranges from 4.5 V

to 18 V. When these devices are used in applications at higher

currents, users should use the following equation to account for

the temperature effects due to the power dissipation increases.

(2)

where:

TJ and TA are the junction and ambient temperatures,

respectively.

PD is the device power dissipation.

θJA is the device package thermal resistance.

BASIC VOLTAGE REFERENCE CONNECTIONS

Voltage references, in general, require a bypass capacitor

connected from VOUT to GND. The circuit in Figure 30

illustrates the basic configuration for the ADR43x family of

references. Other than a 0.1 µF capacitor at the output to help

improve noise suppression, a large output capacitor at the

output is not required for circuit stability.

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

ADR43x

TOP VIEW

(Not to Scale)

NIC

OUTPUT

TRIM

NIC

VIN

µF

0.1

µF

0.1

µF

Figure 30. Basic Voltage Reference Configuration

NOISE PERFORMANCE

The noise generated by the ADR43x family of references is

typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band

for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1

Hz to 10 Hz noise of the ADR431, which is only 3.5 µV p-p. The

noise measurement is made with a band-pass filter made of a

2-pole high-pass filter with a corner frequency at 0.1 Hz and a

2-pole low-pass filter with a corner frequency at 10.0 Hz.

TURN-ON TIME

Upon application of power (cold start), the time required for

the output voltage to reach its final value within a specified

error band is defined as the turn-on settling time. Two compo-

nents normally associated with this are the time for the active

circuits to settle and the time for the thermal gradients on the

chip to stabilize. Figure 17 and Figure 18 show the turn-on

settling time for the ADR431.

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