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COP8SAC7SLB8 数据表(PDF) 27 Page - National Semiconductor (TI) |
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COP8SAC7SLB8 数据表(HTML) 27 Page - National Semiconductor (TI) |
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27 / 60 page ![]() 9.0 Interrupts 9.1 INTRODUCTION The device supports eight vectored interrupts. Interrupt sources include Timer 1, Timer T0, Port L Wakeup, Software Trap, MICROWIRE/PLUS, and External Input. All interrupts force a branch to location 00FF Hex in program memory. The VIS instruction may be used to vector to the appropriate service routine from location 00FF Hex. The Software trap has the highest priority while the default VIS has the lowest priority. Each of the six maskable inputs has a fixed arbitration rank- ing and vector. Figure 21 shows the Interrupt Block Diagram. DS012838-28 FIGURE 21. Interrupt Block Diagram www.national.com 27 |
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