DP83256 datasheet(2/144 Pages) NSC

2 / 144 page

Table of Contents

10 FDDI CHIP SET OVERVIEW

11 FDDI 2-Chip Set

12 FDDI TP-PMD Solutions

20 ARCHITECTURE DESCRIPTION

21 Block Overview

22 Interfaces

30 FUNCTIONAL DESCRIPTION

31 Clock Recovery Module

32 Receiver Block

33 Transmitter Block

34 Configuration Switch

35 Clock Generation Module

36 Station Management Support

37 PHY-MAC Interface

38 PMD Interface

40 MODES OF OPERATION

41 Run Mode

42 Stop Mode

43 Loopback Mode

44 Device Reset

45 Cascade Mode

50 REGISTERS

51 Mode Register (MR)

52 Configuration Register (CR)

53 Interrupt Condition Register (ICR)

54 Interrupt Condition Mask Register (ICMR)

55 Current Transmit State Register (CTSR)

56 Injection Threshold Register (IJTR)

57 Injection Symbol Register A (ISRA)

58 Injection Symbol Register B (ISRB)

59 Current Receive State Register (CRSR)

510 Receive Condition Register A (RCRA)

511 Receive Condition Register B (RCRB)

512 Receive Condition Mask Register A (RCMRA)

513 Receive Condition Mask Register B (RCMRB)

514 Noise Threshold Register (NTR)

515 Noise Prescale Threshold Register (NPTR)

516 Current Noise Count Register (CNCR)

517 Current Noise Prescale Count Register (CNPCR)

518 State Threshold Register (STR)

519 State Prescale Threshold Register (SPTR)

520 Current State Count Register (CSCR)

521 Current State Prescale Count Register (CSPCR)

522 Link Error Threshold Register (LETR)

523 Current Link Error Count Register (CLECR)

524 User Definable Register (UDR)

525 Device ID Register (DIR)

526 Current Injection Count Register (CIJCR)

527 Interrupt Condition Comparison Register (ICCR)

528 Current

Transmit

State

Comparison

(CTSCR)

529 Receive Condition Comparison Register A (RCCRA)

530 Receive Condition Comparision Register B (RCCRB)

531 Mode Register 2 (MODE2)

532 CMT Condition Comparison Register (CMTCCR)

533 CMT Condition Register (CMTCR)

534 CMT Condition Mask Register (CMTCMR)

535 Reserved Registers 22H-23H (RR22H-RR23H)

536 Scrub Timer Threshold Register (STTR)

537 Scrub Timer Value Register (STVR)

538 Trigger Definition Register (TDR)

539 Trigger Transition Configuration Register (TTCR)

540 Reserved Registers 28H-3AH (RR28H-RR3AH)

541 Clock Generation Module Register (CGMREG)

542 Alternate PMD Register (APMDREG)

543 Gain Register (GAINREG)

544 Reserved Registers 3EH-3FH (RR3EH-RR3FH)

60 SIGNAL DESCRIPTIONS

61 DP83256VF Signal Descriptions

62 DP83256VF-AP Signal Descriptions

63 DP83257VF Signal Descriptions

70 ELECTRICAL CHARACTERISTICS

71 Absolute Maximum Ratings

72 Recommended Operating Conditions

73 DC Electrical Characteristics

74 AC Electrical Characteristics

80 CONNECTION DIAGRAMS

81 DP83256VF Connection DiagramPin Descriptions

82 DP83256VF-AP Connection DiagramPin Descrip-

tions

83 DP83257VF Connection DiagramPin Descriptions

90 PACKAGE INFORMATION

91 Land Patterns

92 Mechanical Drawings

DP83256 数据表(PDF) 2 Page - National Semiconductor (TI)

DP83256 数据表(HTML) 2 Page - National Semiconductor (TI)

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