18-Bit Registers

CY74FCT16823T

CY74FCT162823T

SCCS062B - August 1994 - Revised September 2001

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

Copyright

Features

• Edge-rate control circuitry for significantly improved

noise characteristics

• Typical output skew < 250 ps

• ESD > 2000V

• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)

packages

• Industrial temperature range of

−40˚C to +85˚C

CY74FCT16823T Features:

• 64 mA sink current, 32 mA source current

CY74FCT162823T Features:

• Balanced 24 mA output drivers

• Reduced system switching noise

TA = 25˚C

Functional Description

The CY74FCT16823T and the CY74FCT162823T 18-bit bus

interface registers are designed for use in high-speed,

low-power systems needing wide registers and parity. 18-bit

operation is achieved by connecting the control lines of the two

9-bit

registers.

Flow-through

pinout

and

small

shrink

packaging aids in simplifying board layout.

This

device

is

fully

specified

for

partial-power-down

preventing damaging current backflow through the device

when it is powered down.

The

CY74FCT16823T

is

ideally

suited

for

driving

high-capacitance loads and low-impedance backplanes.

The CY74FCT162823T has 24-mA balanced output drivers

with current limiting resistors in the outputs. This reduces the

need for external terminating resistors and provides for

minimal undershoot and reduced ground bounce. The

CY74FCT162823T is ideal for driving transmission lines.

Logic Block Diagrams

C

Pin Configuration

D

R

1

2

3

4

5

6

7

8

9

10

11

12

33

32

31

30

29

36

35

34

SSOP/TSSOP

Top View

13

15

16

17

18

19

20

21

22

23

24

45

44

43

42

41

37

38

39

40

48

47

46

GND

GND

FCT16823-1

TO 8 OTHER CHANNELS

GND

GND

GND

GND

25

26

27

28

49

50

51

52

53

54

55

56

C

D

R

TO 8 OTHER CHANNELS

14

GND

GND

FCT16823-2

FCT16823-3