AMC7812BSPAPR datasheet(29/92 Pages) TI1

29 / 92 page

40W

40pF

50W

CH0

CH3

50W

CH4

CH15

ADC-GND

50W

40W

40pF

DeviceinHoldMode

AMC7812B

www.ti.com

SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013

THEORY OF OPERATION

ADC OVERVIEW

The AMC7812B has two analog-to-digital converters (ADCs): a primary ADC and a secondary ADC. The primary

ADC features a 16-channel multiplexer, an on-chip track-and-hold, and a successive approximation register

(SAR) ADC based on a capacitive digital-to-analog converter (DAC). This ADC runs at 500 kSPS and converts

the analog channel inputs, CH0 to CH15. The analog input range for the device can be selected as 0 V to VREF

or 0 V to (2 × VREF). The analog input can be configured for either single-ended or differential signals. The device

has an on-chip 2.5-V reference that can be disabled when an external reference is preferred. If the internal ADC

reference is to be used elsewhere in the system, the output must first be buffered. The various monitored and

uncommitted input signals are multiplexed into the ADC. The secondary ADC is a part of the temperature-

sensing function that converts the analog temperature signals.

ANALOG INPUTS

The device has 16 uncommitted analog inputs; 12 of these inputs (CH4 to CH15) are single-ended. The inputs

for CH0 to CH3 can be configured as four single-ended inputs or two fully-differential channels, depending on the

setup of the ADC channel registers, ADC Channel Register 0 and ADC Channel Register 1. See the Registers

section for details. Figure 80 shows the device equivalent input circuit. The (peak) input current through the

analog inputs depends on the sample rate, input voltage, and source impedance. The current into the device

charges the internal capacitor array during the sample period. After this capacitance is fully charged, there is no

further input current. The source of the analog input voltage must be able to charge the input capacitance to a

12-bit settling level within the acquisition time. When the converter goes into hold mode, the input impedance is

greater than 1 G

Ω.

Figure 80. Equivalent Input Circuit

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