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74LVC2G02DP 数据表(PDF) 10 Page - Panasonic Semiconductor |
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74LVC2G02DP 数据表(HTML) 10 Page - Panasonic Semiconductor |
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10 / 16 page  2004 Sep 15 10 Philips Semiconductors Product specification Dual 2-input NOR gate 74LVC2G02 AC WAVEFORMS handbook, halfpage MNA218 tPHL tTHL tTLH tPLH VM VM nA, nB input nY output GND VI VOH VOL Fig.6 The input (nA, nB) to output (nY) propagation delays. VOL and VOH are typical output voltage drop that occur with the output load. VCC VM INPUT VI tr =tf 1.65 V to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 V to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 V to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 V to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns |
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