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DAC70004 数据表(PDF) 13 Page - Texas Instruments

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部件名 DAC70004
功能描述  Quad 16-,14-,12-Bit, 1 LSB INL, Buffered, Voltage-Output Digital-to-Analog Converters
PDF  38 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

DAC70004 数据表(HTML) 13 Page - Texas Instruments

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VDD (V)
2.7
3.1
3.5
3.9
4.3
4.7
5
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
D001
Ch-A DNL Max
Ch-B DNL Max
Ch-C DNL Max
Ch-D DNL Max
Ch-A DNL Min
Ch-B DNL Min
Ch-C DNL Min
Ch-D DNL Min
VDD (V)
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
-1.8
-1.5
-1.2
-0.9
-0.6
-0.3
0.0
0.3
0.6
0.9
1.2
1.5
1.8
D001
Channel A (5 k://200 pF)
Channel B (5 k://200 pF)
Channel C (5 k://200 pF)
Channel D (5 k://200 pF)
Temperature (oC)
-40
-25
-10
5
20
35
50
65
80
95
110 125
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0.00
0.01
0.02
0.03
0.04
0.05
0.06
0.07
D001
Channel A (5 k://200 pF)
Channel B (5 k://200 pF)
Channel C (5 k://200 pF)
Channel D (5 k://200 pF)
Channel A (no load)
Channel B (no load)
Channel C (no load)
Channel D (no load)
VDD (V)
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
D001
Ch-A Max
Ch-B Max
Ch-C Max
Ch-D Max
Ch-A Min
Ch-B Min
Ch-C Min
Ch-D Min
Temperature (oC)
-40
-25
-10
5
20
35
50
65
80
95
110 125
-1.8
-1.5
-1.2
-0.9
-0.6
-0.3
0.0
0.3
0.6
0.9
1.2
1.5
1.8
D001
Channel A (5 k://200 pF)
Channel B (5 k://200 pF)
Channel C (5 k://200 pF)
Channel D (5 k://200 pF)
Temperature (oC)
-40
-25
-10
5
20
35
50
65
80
95
110 125
-0.05
-0.04
-0.03
-0.02
-0.01
0.00
0.01
0.02
0.03
0.04
0.05
D001
Channel A (5 k://200 pF)
Channel B (5 k://200 pF)
Channel C (5 k://200 pF)
Channel D (5 k://200 pF)
Channel A (no load)
Channel B (no load)
Channel C (no load)
Channel D (no load)
13
DAC80004, DAC70004, DAC60004
www.ti.com
SLASED6B – APRIL 2016 – REVISED JUNE 2016
Product Folder Links: DAC80004 DAC70004 DAC60004
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Typical Characteristics (continued)
At TA = 25°C, VDD = 2.7 V, REFIN = 2.5 V, DAC output unloaded, unless otherwise noted.
Figure 21. Offset Error vs Temperature
Figure 22. Gain Error vs Temperature
Figure 23. Full Scale Error vs Temperature
DAC load 5 k
Ω//200 pF
Figure 24. Linearity Error (Max-Min) vs Power Supply
Voltage
DAC load 5 k
Ω//200 pF
Figure 25. Differential Linearity Error (Max-Min) vs Power
Supply Voltage
Figure 26. Offset Error vs Power Supply Voltage



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