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AD1981A 数据表(PDF) 21 Page - Analog Devices |
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AD1981A 数据表(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() REV. 0 AD1981A –21– REGM0 Master Codec Register Mask REGM1 Slave 1 Codec Register Mask REGM2 Slave 2 Codec Register Mask SLOT16 Enable 16-Bit Slot Mode. SLOT16 makes all AC link slots 16 bits in length, formatted into 16 slots. This is a preferred mode for DSP serial port interfacing. Miscellaneous Control Bits (Index 76h) Reg Num Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 76h Misc Control Bits DACZ X MSPLT X DAM X FMXE X X MADPD X MADST VREFH VREFD MBG1 MBG0 0000h MBG[1:0] MIC Boost Gain Change Register: These two bits allow changing the MIC preamp gain from the nominal 20 dB gain. Note: This gain setting only takes effect while Bit D6 (M20) on the MIC Volume Register (0Eh) is set to 1. Otherwise the MIC boost block has a gain of 0 dB. 00 = 20 dB Gain (Reset Default) 01 = 10 dB Gain 10 = 30 dB Gain 11 = Reserved VREFD VREFOUT Disable: Disables VREFOUT placing it into High Zout mode. Note that this bit overrides the VREFH bit selection (see below). 0 = VREFOUT Pin Is Driven by the Internal Reference (Reset Default) 1 = VREFOUT Pin Is Placed into High Zout Mode VREFH VREFOUT High: Changes VREFOUT from 2.25 V to 3.70 V for MIC bias applications. 0 = VREFOUT Pin Is set to 2.25 V Output (Reset Default) 1 = VREFOUT Pin Is set to 3.70 V Output MADST Mixer ADC Status Bit: Indicates status of mixer digitizing ADC (L/R channels) 0 = Mixer ADC Not Ready 1 = Mixer ADC Is Ready MADPD Mixer ADC Power-Down: Controls power-down for mixer digitizing ADC. 0 = Mixer ADC Is Powered-On (Default) 1 = Mixer ADC Is Powered-Down FMXE Front DAC into Mixer Enable: Controls the Front (main) DAC to Mixer mute switches. 0 = Front DAC Outputs Are Allowed to Sum into the Mixer (Reset Default) 1 = Front DAC Outputs Are Muted into the Mixer (Blocked) DAM Digital Audio Mode: PCM DAC outputs bypass the analog mixer and are sent directly to the Codec output. MSPLT Mute Split: Allows separate mute control bits for master, Headphone, LINE_IN, CD, AUX, and PCM volume control Registers as well as Record Gain Register and mixer ADC volume. 0 = Both Left and Right Channel Mutes Are Controlled by Bit 15 in the Respective Registers (Reset Default) 1 = Bit 15 Affects Only the Left Channel Mute and Bit 7 Affects Only the Right Channel Mute DACZ DAC Zero-Fill: (versus repeat) if DAC is starved for data. 0 = When DAC Is Filled with Repeat Data 1 = When DAC Is Filled with Zeros (Reset Default) Vendor ID Registers (Index 7Ch) Reg Num Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 7Ch Vendor ID1 F 7 F 6 F 5 F 4 F 3 F 2 F 1 F 0 S7 S6 S5 S4 S3 S2 S1 S0 4144h S[7:0] This register is ASCII encoded to ‘A’ F[7:0] This register is ASCII encoded to ‘D’ |
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