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AD6635BB/PCB 数据表(PDF) 9 Page - Analog Devices

部件名 AD6635BB/PCB
功能描述  4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
PDF  60 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6635BB/PCB 数据表(HTML) 9 Page - Analog Devices

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AD6635
–9–
GENERAL TIMING CHARACTERISTICS1, 2
Test
AD6635BB
Parameter (Conditions)
Temp
Level
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
tSPA
PxACK to
ØPCLKn Setup Time
1.0
ns
tHPA
PxACK to
ØPCLKn Hold Time
1.0
ns
LINK PORT TIMING REQUIREMENTS
SWITCHING CHARACTERISTICS
3
tRDLCLK
≠PCLKn to ≠LxCLKOUT Delay
Full
IV
2.5
ns
tFDLCLK
ØPCLKn to ØLxCLKOUT Delay
Full
IV
0
ns
tRLCLKDAT
≠LxCLKOUT to Lx[7:0] Delay
Full
IV
0
2.9
ns
tFLCLKDAT
ØLxCLKOUT to Lx[7:0] Delay
Full
IV
0
2.2
ns
NOTES
1All Timing Specifications valid over VDD range of 2.25 V to 2.75 V, and VDDIO range of 3.0 V to 3.6 V.
2C
LOAD = 40 pF on all outputs unless otherwise specified.
3The timing parameters for Px[15:0], PxREQ, PxACK, LxCLKOUT, and Lx[7:0] apply for output ports A, B, C, and D. (x stands for A, B, C, or D.)
Specifications subject to change without notice.



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