DP83902A datasheet(2/70 Pages) NSC

2 / 70 page

General Description (Continued)

The Media Access Control function which is provided by the

Network Interface Control module (NIC) provides simple

and efficient packet transmission and reception control by

means of unique dual DMA channels and an internal FIFO

Bus arbitration and memory control logic are integrated to

reduce board cost and area overheads

DP83902A provides a comprehensive single chip solution

for 10BASE-T IEEE 8023 networks and is designed for

easy interface to other transceivers via the AUI interface

Due to the inherent constraints of CMOS processing isola-

tion is required at the AUI differential signal interface for

10BASE5 and 10BASE2 applications Capacitive or induc-

tive isolation may be used

Table Of Contents

10 SYSTEM DIAGRAM

20 PIN DESCRIPTION

30 BLOCK DIAGRAM

40 FUNCTIONAL DESCRIPTION

50 TRANSMITRECEIVE PACKET

ENCAPSULATIONDECAPSULATION

60 DIRECT MEMORY ACCESS CONTROL (DMA)

70 PACKET RECEPTION

80 PACKET TRANSMISSION

90 REMOTE DMA

100 INTERNAL REGISTERS

110 INITIALIZATION PROCEDURES

120 LOOPBACK DIAGNOSTICS

130 BUS ARBITRATION AND TIMING

140 PRELIMINARY ELECTRICAL CHARACTERISTICS

150 SWITCHING CHARACTERISTICS

160 AC TIMING TEST CONDITIONS

170 PHYSICAL DIMENSIONS

Connection Diagrams

TLF11157 – 2

Order Number DP83902AV

See NS Package Number V84A

DP83902A 数据表(PDF) 2 Page - National Semiconductor (TI)

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