CY54FCT646T, CY74FCT646T

8-BIT REGISTERED TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS031A – JULY 1994 – REVISED OCTOBER 2001

7

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

CY54FCT646T

CY74FCT646T

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

MIN

TYP†

MAX

UNIT

#

V5 5 V

One bit

switching

at f1 = 5 MHz

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

0.7

1.4

#

VCC = 5.5 V,

f0 = 10 MHz,

Outputs open

1

at 50% duty

cycle

VIN = 3.4 V or GND

1.2

3.4

mA

#

Outputs open,

G = DIR = GND,

SAB = SBA = GND

Eight bits

switching

at f1 = 5 MHz

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

2.8

5.6||

mA

IC#

1

at 50% duty

cycle

VIN = 3.4 V or GND

5.1

14.6||

IC#

V

5 25 V

One bit

switching

at f1 = 5 MHz

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

0.7

1.4

VCC = 5.25 V,

f0 = 10 MHz,

Outputs open

1

at 50% duty

cycle

VIN = 3.4 V or GND

1.2

3.4

mA

Outputs open,

G = DIR = GND,

SAB = SBA = GND

Eight bits

switching

at f1 = 5 MHz

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

2.8

5.6||

mA

1

at 50% duty

cycle

VIN = 3.4 V or GND

5.1

14.6||

Ci

6

10

6

10

pF

Co

8

12

8

12

pF

# IC

= ICC + ∆ICC × DH × NT + ICCD(f0/2 + f1 × N1)

Where:

IC

= Total supply current

ICC

= Power-supply current with CMOS input levels

∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)

DH

= Duty cycle for TTL inputs high

NT

= Number of TTL inputs at DH

ICCD = Dynamic current caused by an input transition pair (HLH or LHL)

f0

= Clock frequency for registered devices, otherwise zero

f1

= Input signal frequency

N1

= Number of inputs changing at f1

All currents are in milliamperes and all frequencies are in megahertz.

|| Values for these conditions are examples of the ICC formula.