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ADF4153BCP 数据表(PDF) 15 Page - Analog Devices |
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ADF4153BCP 数据表(HTML) 15 Page - Analog Devices |
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15 / 24 page ![]() ADF4153 Rev. A | Page 15 of 24 Table 9. Control Register Map U3 POWER-DOWN 0 NORMAL OPERATION 1 POWER-DOWN U4 LDP 0 1 3 5 ICP(mA) CP3 CP2 CP1 CP0 2.7k Ω 5.1k Ω 10k Ω 0 1.09 0.63 0.29 0 2.18 1.25 0.59 0 3.26 1.88 0.88 0 4.35 2.50 1.15 0 5.44 3.13 1.47 0 6.53 3.75 1.76 0 7.62 4.38 2.06 0 8.70 5.00 2.35 1 0.54 0.31 0.15 1 1.10 0.63 0.30 1 1.64 0.94 0.44 1 2.18 1.25 0.588 1 2.73 1.57 0.74 1 3.27 1.88 0.88 1 3.81 2.19 1.03 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 4.35 2.50 1.18 U5 PD POLARITY 0 NEGATIVE 1 POSITIVE U2 CP THREE-STATE 0 DISABLED 1 THREE-STATE U1 COUNTER RESET 0 DISABLED ENABLED 1 REFERENCE DOUBLER U6 0 DISABLED 1 ENABLED DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C2 (1) C1 (0) U1 U2 U3 U4 U5 CP0 CP1 CP2 U6 S1 S2 S3 S4 CONTROL BITS CP CURRENT SETTING RESYNC DB15 CP3 S4 S3 S2 S1 RESYNC 01 1 00 2 01 3 .. . .. . .. . 11 13 10 14 1 0 0 0 . . . 1 1 1 0 1 1 . . . 0 1 11 15 |
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