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GD65232 数据表(PDF) 8 Page - Texas Instruments |
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GD65232 数据表(HTML) 8 Page - Texas Instruments |
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8 / 23 page ![]() GD65232, GD75232 MULTIPLE RS232 DRIVERS AND RECEIVERS SLLS206J − MAY 1995 − REVISED NOVEMBER 2004 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VI VSS VDD VCC Figure 4. Receiver Test Circuit for IOS VIT, VI IOL VOH −IOH VOL VSS VDD VCC Figure 5. Receiver Test Circuit for VIT, VOH, and VOL Pulse Generator See Note A CL (see Note B) RL 4 V 0 V Input tPHL tPLH tTHL tTLH VOH VOL TEST CIRCUIT VOLTAGE WAVEFORMS Input Output VSS NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns. B. CL includes probe and jig capacitance. VDD VCC 50% 50% 90% 50% 10% 50% 10% 90% Figure 6. Receiver Propagation and Transition Times |
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