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DP83910AV 数据表(PDF) 7 Page - National Semiconductor (TI) |
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DP83910AV 数据表(HTML) 7 Page - National Semiconductor (TI) |
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7 / 12 page ![]() 90 Switching Characteristics TA e 0 Cto70 C VCC e 5V g5% Oscillator Specification Symbol Parameter Min Max Units tXTH X1 to Transmit Clock High 5 30 ns tXTL X1 to Transmit Clock Low 5 30 ns Transmit Timing (Start of Packet) TLF9365 – 4 Transmit Specifications (Start of Packet) Symbol Parameter Min Max Units tTCh Transmit Clock High Time (Note 1) 40 60 ns tTCl Transmit Clock Low Time (Note 1) 40 60 ns tTCc Transmit Clock Cycle Time (Note 1) 9999 10001 ns tTCr Transmit Clock Rise Time (20% to 80%) (CL e 30 pF) 8 ns tTCf Transmit Clock Fall Time (80% to 20%) (CL e 30 pF) 8 ns tTEs Transmit Enable Setup Time to Rising Edge of TXC (Note 1) 20 ns tTDs Transmit Data Setup Time from Rising Edge of TXC (Note 1) 20 ns tTDh Transmit Data Hold Time 0ns from Rising Edge of TXC tTOd Transmit Output Delay from Rising Edge of TXC (Note 1) 65 ns tTOf Transmit Output Fall Time (80% to 20%) 7 ns tTOr Transmit Output Rise Time (20% to 80%) 7 ns tTOj Transmit Output Jitter 05 Typical ns Note 1 This parameter is measured using the fifty percent point of each clock edge 7 |
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