数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

SCAN25100TYAX/NOPB 数据表(PDF) 5 Page - Texas Instruments

部件名 SCAN25100TYAX/NOPB
功能描述  SCAN25100 2457.6, 1228.8, and 614.4 Mbps CPRI SerDes with Auto RE Sync and Precision Delay Calibration Measurement
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

SCAN25100TYAX/NOPB 数据表(HTML) 5 Page - Texas Instruments

  SCAN25100TYAX/NOPB Datasheet HTML 1Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 2Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 3Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 4Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 5Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 6Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 7Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 8Page - Texas Instruments SCAN25100TYAX/NOPB Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 38 page
background image
SCAN25100
www.ti.com
SNLS223C – SEPTEMBER 2006 – REVISED APRIL 2013
PIN DESCRIPTIONS(1) (continued)
Pin #
Pin Name
I/O, Type
Description
99
LOOP [0]
I, LVTTL or 1.8V
Loop back configuration.
100
LOOP [1]
LVCMOS, Internal
Pulling both pins low enables MDIO control.
pull down
Note: During Special line (remote) loop back mode, the output de-emphasis control is
disabled.
LOOP [1]
LOOP [0]
0
0
Normal mode—no loop back
0
1
Line (remote) loop back mode
1
0
Local loop back mode
1
1
Special line (remote) loop back mode
MDC/MDIO
30
MDC
3.3V LVTTL
MDC/MDIO configuration bus.
31
MDIO
Internal pull up on
Protocol per IEEE 802.2ae-2002 MDC/MDIO Clause 45. These pins are 3.3V LVTTL
37
ADD0
ADDR pins
compatible, not 1.2V signal compatible.
36
ADD1
35
ADD2
34
ADD3
33
ADD4
IEEE 1149.1 (JTAG)
45
TDI
3.3V LVTTL
JTAG test bus for IEEE 1149.1 and 1149.6 support.
41
TDO
Internal pull up on
44
TMS
TDI, TMS, and
43
TCK
TRSTB
46
TRSTB
RESERVED PINS
83
RES1
I
Reserved.
84
RES2
Tie with 5 K
Ω resistor to ground.
POWER
9, 15, 20,
AVDD18
I, Power
1.8V analog supply.
32, 38, 47,
85
8, 14, 21,
AVDD33
I, Power
3.3V analog supply.
42
1, 2, 28,
PVDD33
I, Power
3.3V PLL supply (minimize supply noise to < 100 mV peak-to-peak).
29
50, 51, 76, IOVDD
I, Power
1.8V or 3.3V parallel I/O bus and control pin supply.
87
See VSEL pin description for additional information.
GROUND
3, 4, 5, 10, GND
I, Ground
Device ground.
13, 16, 19,
24, 25, 26,
27, 39, 40,
48, 49, 63,
75, 86
GROUND DAP
101
GND
I, Ground
Device ground. Pad must be soldered and contected to GND plane with a minimum of 8
thermal vias to achieve specified thermal performance.
Copyright © 2006–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: SCAN25100



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com