WM8962B datasheet(21/295 Pages) WOLFSON

部件名	WM8962B

功能描述	Ultra-Low Power Stereo CODEC with Audio Enhancement DSP, 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers

PDF	295 Pages

Scroll/Zoom	100%

制造商	WOLFSON [Wolfson Microelectronics plc]

网页	http://www.wolfsonmicro.com

标志

21 / 295 page

WM8962

Rev 4.3

TYPICAL PERFORMANCE

TYPICAL POWER CONSUMPTION

Analogue Input (IN1L, IN1R) to ADC out via Input PGA and Input Gain boost

Quiescent input, default register conditions unless otherwise stated.

MCLK = 12.288MHz, fs = 48kHz, MCLK rate = 256fs, 24-bit I2S, Slave mode,

INL_ENA = 1, INR_ENA = 1,

INPGAL_MUTE = 0, INPGAR_MUTE = 0,

ADCL_ENA = 1, ADCR_ENA = 1

VMID_SEL = 01, BIAS_ENA = 1

See “Reference Voltages and Bias Control” for details of the bias configuration registers.

DCVDD

1.8V

DBVDD

1.8V

MICVDD

2.5V

AVDD

1.8V

PLLVDD

1.8V

CPVDD

1.8V

SPKVDD

5.0V

TOTAL

Quiescent input,

Option 1 bias settings

2.4mA

0.0mA

2.5mA

0.0mA

8.8mW

Quiescent input,

Option 2 bias settings

2.4mA

0.0mA

2.7mA

0.0mA

9.2mW

Quiescent input,

Option 3 bias settings (default)

2.4mA

0.0mA

3.3mA

0.0mA

10.3mW

Quiescent input,

Option 4 bias settings

2.6mA

0.0mA

5.4mA

0.0mA

14.4mW

-1dBFS ADC output

2.4mA

0.0mA

3.3mA

0.0mA

10.4mW

MICBIAS enabled

2.4mA

0.0mA

0.4mA

3.3mA

0.0mA

11.3mW

Quiescent input,

fs = 8kHz, MCLK = 2.048MHz

0.3mA

0.0mA

3.0mA

0.0mA

6.0mW

Quiescent input,

fs = 96kHz, MCLK = 24.576MHz

4.1mA

0.0mA

3.3mA

0.0mA

13.3mW

Quiescent input,

fs = 48kHz, MCLK = 24.576MHz,

MCLK = 512fs,

DSP Sound Enhancement enabled

14.5mA

0.2mA

0.0mA

3.2mA

0.0mA

32.4mW

WM8962B 数据表(PDF) 21 Page - Wolfson Microelectronics plc

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