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WM8993 数据表(PDF) 28 Page - Wolfson Microelectronics plc

部件名 WM8993
功能描述  Audio Hub CODEC for Multimedia Phones
PDF  229 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8993 数据表(HTML) 28 Page - Wolfson Microelectronics plc

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WM8993
Production Data
w
PD, November 2010, Rev 4.0
28
SIGNAL TIMING REQUIREMENTS
MASTER CLOCK
MCLK
tMCLKL
tMCLKH
tMCLKY
Figure 2 Master Clock Timing
Test Conditions
The following timing information is valid across the full range of recommended operating conditions.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT
Master Clock Timing
MCLK cycle time
TMCLKY
(MCLK as input to FLL)
33.33
ns
(FLL not used, MCLK_DIV = 1
40
ns
(FLL not used, MCLK_DIV = 0
80
ns
MCLK duty cycle
(= TMCLKH : TMCLKL)
60:40
40:60



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