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WM8994 数据表(PDF) 39 Page - Wolfson Microelectronics plc |
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WM8994 数据表(HTML) 39 Page - Wolfson Microelectronics plc |
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39 / 359 page ![]() Production Data WM8994 w PD, April 2012, Rev 4.4 39 CONTROL INTERFACE TIMING 2-WIRE (I2C) CONTROL MODE Figure 7 Control Interface Timing - 2-wire (I2C) Control Mode Test Conditions The following timing information is valid across the full range of recommended operating conditions. PARAMETER SYMBOL MIN TYP MAX UNIT SCLK Frequency 400 kHz SCLK Low Pulse-Width t1 1300 ns SCLK High Pulse-Width t2 600 ns Hold Time (Start Condition) t3 600 ns Setup Time (Start Condition) t4 600 ns Data Setup Time t5 100 ns SDA, SCLK Rise Time t6 300 ns SDA, SCLK Fall Time t7 300 ns Setup Time (Stop Condition) t8 600 ns Data Hold Time t9 900 ns Pulse width of spikes that will be suppressed tps 0 5 ns |
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