TAS5112

SLES048C − JULY 2003 − REVISED MARCH 2004

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3

Terminal Functions

TERMINAL

FUNCTION(1)

DESCRIPTION

NAME

NO.

FUNCTION(1)

DESCRIPTION

BST_A

31

P

High-side bootstrap supply (BST), external capacitor to OUT_A required

BST_B

42

P

High-side bootstrap supply (BST), external capacitor to OUT_B required

BST_C

43

P

HS bootstrap supply (BST), external capacitor to OUT_C required

BST_D

54

P

HS bootstrap supply (BST), external capacitor to OUT_D required

DGND

23

P

Digital I/O reference ground

DREG

16

P

Digital supply voltage regulator decoupling pin, capacitor connected to GND

DREG_RTN

12

P

Digital supply voltage regulator decoupling return pin

DVDD

25

P

I/O reference supply input (3.3 V)

GND

1, 2, 22, 24,

27, 28, 29, 36,

37, 48, 49, 56

P

Power ground

GREG

3, 26

P

Gate drive voltage regulator decoupling pin, capacitor to REG_GND

GVDD

30, 55

P

Voltage supply to on-chip gate drive and digital supply voltage regulators

M1 (TST0)

15

I

Mode selection pin

M2

14

I

Mode selection pin

M3

13

I

Mode selection pin

OTW

4

O

Overtemperature warning output, open drain with internal pullup resistor

OUT_A

34, 35

O

Output, half-bridge A

OUT_B

38, 39

O

Output, half-bridge B

OUT_C

46, 47

O

Output, half-bridge C

OUT_D

50, 51

O

Output, half-bridge D

PVDD_A

32, 33

P

Power supply input for half-bridge A

PVDD_B

40, 41

P

Power supply input for half-bridge B

PVDD_C

44, 45

P

Power supply input for half-bridge C

PVDD_D

52, 53

P

Power supply input for half-bridge D

PWM_AM

20

I

Input signal (negative), half-bridge A

PWM_AP

21

I

Input signal (positive), half-bridge A

PWM_BM

18

I

Input signal (negative), half-bridge B

PWM_BP

17

I

Input signal (positive), half-bridge B

PWM_CM

10

I

Input signal (negative), half-bridge C

PWM_CP

11

I

Input signal (positive), half-bridge C

PWM_DM

8

I

Input signal (negative), half-bridge D

PWM_DP

7

I

Input signal (positive), half-bridge D

RESET_AB

19

I

Reset signal, active low

RESET_CD

9

I

Reset signal, active low

SD_AB

6

O

Shutdown signal for half-bridges A and B, active-low

SD_CD

5

O

Shutdown signal for half-bridges C and D, active-low

(1) I = input, O = Output, P = Power