SS2015

CMOS High Sensitivity Micropower Hall Latch

1

V3.10

Nov 1, 2013

Packages

Features and Benefits

3 pin SIP (suffix UA)

1.

Operation down to 4.5V

2.

Wide operating voltage range

3.

High sensitivity for direct reed switch re-

placement applications

4.

Output switches with absolute

value of North or South pole from magnet

5.

Temperature compensation

6.

Open-Collector pre-driver

7.

60V maximum withstand voltage

8.

Reverse polarity protection

9.

Package: TO-92S(SIP)

Functional Block Diagram

Application Examples

1.

Brush-less DC Motor

2.

Brush-less DC Fan

3.

Revolution counting

4.

Speed measurement

General Description:

The SS2015 Hall effect latch sensor IC is fabricated from mixed signal CMOS technology. It incorporates ad-

vanced chopper-stabilization techniques to provide accurate and stable magnetic switch points.

The circuit design provides an internally controlled clocking mechanism to cycle power to the Hall element and

analog signal processing circuits. This serves to place the high current-consuming portions of the circuit into a

“Sleep” mode. Periodically the device is “Awakened” by this internal logic and the magnetic flux from the Hall

olds then the output transistor is driven to change states accordingly. While in the “Sleep” cycle the output tran-

sistor is latched in its previous state. The design has been optimized for service in applications requiring extended

operating lifetime in battery powered systems. An internal bandgap regulator is used to provide temperature com-

pensated supply voltage for internal circuits and allows a wide operating supply range.

of a magnetic field.

3 pin SOT23W

(suffix SO)