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DP8570A 数据表(PDF) 13 Page - National Semiconductor (TI) |
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DP8570A 数据表(HTML) 13 Page - National Semiconductor (TI) |
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13 / 26 page ![]() Functional Description (Continued) INPUT CLOCK SELECTION The input frequency to the timers may be selected Each timer has a prescaler that gives a wide selection of clocking rates In addition the DP8570A has a single external clock input pin that can be selected for either of the timers Table IV shows the range of programmable clocks available and the corresponding setting in the Timer Control Register TABLE IV Programmable Timer Input Clocks C2 C1 C0 Selected Clock 0 0 0 External 0 0 1 Crystal Oscillator 0 1 0 (Crystal Oscillator)4 0 1 1 935 ms (107 kHz) 1 0 0 1 ms (1 kHz) 1 0 1 10 ms (100 Hz) 1 1 0 110 Second (10 Hz) 1 1 1 1 Second (1 Hz) Note that the second and third selections are not fixed fre- quencies but depend on the crystal oscillator frequency chosen Since the input clock frequencies are usually running asyn- chronously to the timer StartStop control bit a 1 clock cy- cle error may result This error results when the StartStop occurs just after the clock edge (max error) To minimize this error on all clocks an independent prescaler is used for each timer and is designed so that its StartStop error is less than 1 clock cycle The count holdgate bit in the Timer Control Register and the external enable pins G0G1 can be used to suspend the timer operation in modes 0 1 and 2 (in mode 3 it is the trigger input) The external pin and the register bit are OR’ed together so that when either is high the timers are suspend- ed Suspending the timer causes the same synchronization error that starting the timer does The range of errors is specified in Table V TABLE V Maximum Synchronization Errors Clock Selected Error External a Ext Clock Period Crystal a 1 Crystal Clock Period Crystal4 a 1 Crystal Clock Period 107 kHz a 32 ms 1 kHz a 32 ms 100 Hz a 32 ms 10 Hz a 32 ms 1Hz a 32 ms MODES OF OPERATION Bits M0 and M1 in the Timer Control Registers are used to specify the modes of operation The mode selection is de- scribed in Table VI TABLE VI Programmable Timer Modes of Operation M1 M0 Function Modes 0 0 Single Pulse Generator Mode 0 0 1 Rate Generator Pulse Output Mode 1 1 0 Square Wave Output Mode 2 1 1 Retriggerable One Shot Mode 3 MODE 0 SINGLE PULSE GENERATOR When the timer is in this mode the output will be initially low if the Timer StartStop bit is low (stopped) When this mode is initiated the timer output will go high on the next falling edge of the prescaler’s input clock the contents TLF8638 – 9 FIGURE 7 DP8570A Timer Block Diagram 13 |
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