STi5100

2/2

Features

■ Enhanced ST20 32-bit VL-RISC CPU

●

243 MHz, 8Kbyte ICache, 8Kbyte DCache, 4

Kbyte SRAM

■ Unified Memory Interface

■ Dual Transport Stream Merger

●

●

Integrated DES-ECB, DVB and ICAM

descramblers

●

NDS RASP compliant

●

Low cost DVB-CI and Cable Card support

■ MPEG-2 MP@ML Video Decoder

●

Trick modes including smooth fast forward and

rewind

■ Audio

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MPEG-1 layers I/II, MP3

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●

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PCM input, mixing and sample rate conversion

●

●

Simultaneous MPEG audio decode and output

of Dolby streams

■ Graphics/Display

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4 display planes

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2, 4 and 8 bpp CLUT graphics, 256 x 30 bits

(AYCBCr) CLUT entries

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16 bpp true color graphics

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Alpha blending, antialiasing, antiflutter,

antiflicker filters

■ PAL/NTSC/SECAM encoder

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RGB, CVBS, Y/C and YUV outputs with 10-bit

DACs

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CGMS, Teletext, WSS, VPS and close caption

■ On-Chip Peripherals

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4 ASCs (UARTS)

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4 parallel 8-bit I/O banks

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2 smartcard interfaces and clock generators

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3 SSCs for I²C/SPI master/slave interfaces

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Silicon Labs line side (DAA) interface

●

High-speed USB OHCI/EHCI compliant host

interface

●

DiSEqC interface

■ Enhanced Security

Ordering information

Device number

Description

STi5100ZUA

Basic STi5100

STi5100-Mboard

Development platform

STi5100-Ref

Example STB design

STi5100-STDVB

STAPI drivers for DVB

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