TMS320DM641 datasheet(81/171 Pages) TI

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Device Configurations

June 2003 − Revised August 2004

SPRS222C

Shading denotes a peripheral module not available for this configuration.

EMAC

MDIO

VP0

(8-Bit)

McBSP0

McASP0 Data

McBSP1

EMIFA

Clock

and

System

GP0

and

EXT_INT

I2C0

TIMER0

TIMER1

TIMER2

McASP0 Control

MTXD[3:0], MTXEN

MRXD[3:0], MRXER,

MRXDV, MCOL, MCRS,

MTCLK, MRCLK

MDIO, MDCLK

AED[31:0]

AECLKIN, AARDY, AHOLD

AEA[22:3], ACE[3:0], ABE[3:0],

AECLKOUT1, AECLKOUT2,

ASDCKE, ASOE3, APDT,

AHOLDA, ABUSREQ,

AARE/ASDCAS/ASADS/ASRE,

AAOE/ASDRAS/ASOE,

AAWE/ASDWE/ASWE

CLKIN,

CLKMODE0, CLKMODE1

CLKOUT4, CLKOUT6, PLLV

SCL0

SDA0

TINP0

TOUT0/MAC_EN

TINP1

TOUT1/LENDIAN

GP0[3:0]

GP0[7:4]

AHCLKX0, AFSX0,

ACLKX0, AMUTE0,

AMUTEIN0, AHCLKR0,

AFSR0, ACLKR0

AXR0[3:0]

PERCFG Register Value:

0x0000 000F

Extenal Pins:

TOUT0/MAC_EN = 1

CLKR1, FSR1, DR1,

CLKS1, DX1, FSX1,

CLKX1

CLKR0, FSR0, DR0,

CLKS0, DX0, FSX0,

CLKX0

VIC

VDAC

Figure 2−9. Configuration Example B for DM640

(1 McASP0 + 2 McBSPs + VIC + I2C0 + EMIF)

[TBD Application]

TMS320DM641 数据表(PDF) 81 Page - Texas Instruments

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