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SP3203E 数据表(PDF) 7 Page - Exar Corporation |
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SP3203E 数据表(HTML) 7 Page - Exar Corporation |
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7 / 16 page ![]() 7 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3203E_00_2080 DESCRIPTION The SP3203Eisa3-driver/2-receiverdevice ideal for portable or handheld applications. The SP3203E transceivers meet the EIA/ TIA-232andITU-TV.28/V.24communication protocolsandcanbeimplementedinbattery- powered, portable, or handheld applications such as notebook or palmtop computers, PDA'sandcellphones. The SP3203Edevice features Exar's proprietary and patented (U.S.-- 5,306,954) on-board charge pump circuitry that generates ±5.5V RS-232 volt- age levels from a single +3.0V to +5.5V power supply. The SP3203E can operate at a minimum data rate of 250kbps. THEORY OF OPERATION The SP3203E is made up of four basic circuit blocks: . Drivers, 2. Receivers, 3. The Exar propri- etary charge pump, and 4. V L circuitry. Drivers The drivers are inverting level transmitters thatconvertTTLorCMOSlogiclevelsto5.0V EIA/TIA-232 levels with an inverted sense relativetotheinputlogiclevels. Typically,the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. These drivers comply with the EIA-TIA-232F and all previous RS-232 ver- sions. The driver output stages are turned off (High Impedance) when the device is in shutdown mode. The drivers can guarantee output data rates fully loaded with 3kΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC com- munication software. The slew rate of the driver output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2..7, Paragraph 5). The transition of the loaded output from HIGH to LOW also meets the monotonicity requirements of the standard. Figure 2 shows a loopback test circuit used to test the RS-232 Drivers. Figure 3 shows the test results with all drivers active at 20kbpswithtypicalRS-232loadsinparallel with a 000pF capacitors. Figure 4 shows the test results where one driver was active at 250kbps and all three drivers loaded with an RS-232 receiver in parallel with a 000pF capacitor.The transmitter inputs do not have pull-up resistors. Connect unused inputs to ground or V L. Receivers The receivers convert ±5.0V EIA/TIA-232 levels to TTL or CMOS logic output levels. Receivers are disabled when in shutdown. The truth table logic of the SP3203E driver and receiver outputs can be found in Table . Since receiver input is usually from a trans- mission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 500mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, an internal 5kΩ pull-down resistor to ground will commit the output of the receiver to a HIGH state. Charge Pump The charge pump is a patented design (U.S. 5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages of +/-5.5V regardless of input voltage (V CC) over the +3.0V to +5.5V range. This is important to maintain compliant RS- 232 levels regardless of power supply fluctuations. |
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