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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com

SP33_00_0260

FUNCTION TABLE FOR SELECT PINS

A

B

C

D

MODE

FUNCTION

0

0

0

0

RS-232

All four RS-232 drivers active

0

0

0



RS-232

All four RS-232 drivers tri-state

0

0



0

RS-232

All four RS-232 drivers tri-state

0

0





RS-232

RS-232 (4ch) Loopback

0



0

0

RS-232/RS-485

T and T2 active RS-232; T3 tri-state RS-485

0



0



RS-232/RS-485

T and T2 tri-state RS-232; T3 active RS-485

0





0

RS-232/RS-485

T and T2 active RS-232; T3 tri-state RS-485

0







RS-232/RS-485

RS-232 (2ch) / RS-485 (ch) Loopback



0

0

0

RS-485/RS-232

T active RS-485; T3 and T4 active RS-232



0

0



RS-485/RS-232

T tr-state RS-485; T3 active RS-232; T4 active RS232



0



0

RS-485/RS-232

All RS-485 and RS-232 drivers tri-state



0





RS-485/RS-232

RS-485 (ch) / RS-232 (2ch) Loopback





0

0

RS-485

T and T3 active RS-485





0



RS-485

T tri-state RS-485; T3 active RS-485







0

RS-485

T active RS-485; T3 tri-state RS-485









RS-485

RS-485 (2ch) Loopback

Table 1. Mode Function Table. (Refer to Control Logic Confirmations for Block Diagrams)

THEORY OF OPERATION

The

SP331 is made up of four separate

circuit blocks — the charge pump, drivers,

receivers, and decoder. Each of these circuit

blocks is described in more detail below.

Charge–Pump

Thechargepumpisa

Exar–patenteddesign

(U.S.5,306,954)andusesauniqueapproach

compared to older less efficient designs.

The charge pump still requires four external

capacitors, but uses a four–phase voltage

shifting technique to attain symmetrical 0V

power supplies. Figure 5(a) shows the

waveformfoundonthepositivesideofcapci-

tor C2, and Figure 5(b) shows the negative

side of capcitor C2. There is a free–running

oscillator that controls the four phases of

the voltage shifting. A description of each

phase follows.

Phase 1

— V

the clock cycle, the positive side of capaci-

tors C

C

l

+

is then switched to ground and charge

transferred to C

2

–

. Since C

2

+

is connected to

+5V, the voltage potential across capacitor

C

Phase 2

— V

nects the negative terminal of C

storage capacitor and the positive terminal

of C

–l0V to C

of capacitor C

negative side is connected to ground.

Phase 3

— V

of the clock is identical to the first phase

— the charge transferred in C

–5V in the negative terminal of C

is applied to the negative side of capacitor

C

+

is at +5V, the voltage potential

across C

Phase 4

— V

clock connects the negative terminal of C

2