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XR22802 数据表(PDF) 7 Page - Exar Corporation

部件名 XR22802
功能描述  Hi-Speed USB to 10/100 Ethernet Bridge
PDF  46 Pages
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制造商  EXAR [Exar Corporation]
网页  http://www.exar.com
标志 EXAR - Exar Corporation

XR22802 数据表(HTML) 7 Page - Exar Corporation

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XR22802
7 / 46
exar.com/XR22802
Rev 1B
Type: I = Input, O = Output, I/O = Input/Output, PWR = Power, OD = Open-Drain
40
GND
PWR
Power supply common, ground
41
E6/RXA/RWKA#
I/O
Enhanced general purpose IO, or UART channel A RX data, or remote wakeup. Defaults to
UART RX data.
42
E7/TXA
I/O
Enhanced general purpose IO, or UART channel A TX data. Defaults to UART TX data.
43
E5/RTSA#/RS485A/GA5
I/O
Enhanced general purpose IO, or UART channel A Request to Send, or auto-RS485 half-
duplex enable, or general purpose IO. Defaults to UART GPIO input except when XR22802 is
used with CDC-ACM driver. Refer to Automatic RTS/CTS Hardware Flow Control section on
page 14 or Auto RS-485 Half-Duplex Control on page 15.
44
E4/CTSA#/GA4
I/O
Enhanced general purpose IO, or UART channel A Clear to Send, or general purpose IO.
Defaults to UART GPIO input except when XR22802 is used with CDC-ACM driver. Refer to
Automatic RTS/CTS Hardware Flow Control section on page 14.
45
E14/RXB/RWKB#
I/O
Enhanced general purpose IO, or UART channel B RX data, or remote wakeup. Defaults to
UART RX data.
46
E15/TXB
I/O
Enhanced general purpose IO, or UART channel B TX data. Defaults to UART TX data.
47
E13/RTSB#/RS485B/GB5
I/O
Enhanced general purpose IO, or UART channel B Request to Send, or channel B auto-
RS485 half-duplex enable, or general purpose IO. Defaults to UART GPIO input except when
XR22802 is used with CDC-ACM driver. Refer to Automatic RTS/CTS Hardware Flow Control
section on page 14 or Auto RS-485 Half-Duplex Control on page 15.
48
E12/CTSB#/GB4
I/O
Enhanced general purpose IO, or UART channel B Clear to Send, or general purpose IO.
Defaults to UART GPIO input except when XR22802 is used with CDC-ACM driver. Refer to
Automatic RTS/CTS Hardware Flow Control section on page 14.
49
LOW_PWR#
O
The LOW_PWR# pin will be asserted whenever it is not safe to draw the amount of current
requested from VBUS in the Device Maximum Power field of the Configuration Descriptor.
The LOW_PWR# pin is asserted when the XR22802 is in suspend mode or when it is not yet
configured. The LOW_PWR# pin will be de-asserted whenever it is safe to draw the amount
of current requested in the Device Maximum Power field. Note that the XR22802 device is a
high power device. The default polarity of the LOW_PWR# output pin is active low and is pro-
grammable via the OTP.
50
GND
PWR
Power supply common, ground
51
E10/DSRB#/GB2
I/O
Enhanced general purpose IO, or UART channel B Data Set Ready, or general purpose IO.
Defaults to UART GPIO input. Refer to Automatic DTR/DSR Hardware Flow Control section
on page 14.
52
E11/DTRB#/GB3
I/O
Enhanced general purpose IO, or UART channel B Data Terminal Ready, or general purpose
IO. Defaults to UART GPIO input. Refer to Automatic DTR/DSR Hardware Flow Control sec-
tion on page 14
53
E2/DSRA#/GA2
I/O
Enhanced general purpose IO, or UART channel A Data Set Ready, or general purpose IO.
Defaults to UART GPIO input. Refer to Automatic DTR/DSR Hardware Flow Control section
on page 14.
54
E3/DTRA#/GA3
I/O
Enhanced general purpose IO, or UART channel A Data Terminal Ready, or general purpose
IO. Defaults to UART GPIO input. Refer to Automatic DTR/DSR Hardware Flow Control sec-
tion on page 14.
55
SCL
I/O OD
I2C Master controller serial clock (open-drain) External pull-up resistor required on this pin.
56
SDA
I/O OD
I2C Master controller data (open-drain). External pull-up resistor required on this pin.
Pin No.
Pin Name
Type
Description



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