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LMH6720MA 数据表(PDF) 12 Page - Texas Instruments |
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LMH6720MA 数据表(HTML) 12 Page - Texas Instruments |
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12 / 29 page ![]() +5V C4 C2 .01PF 6.8PF .1PF C1 C3 .01PF 6.8PF C5 + - 50: 50: ROUT RIN OUT IN 300: 300: RF RG -5V LMH6714, LMH6720 LMH6722, LMH6722-Q1 SNOSA39G – NOVEMBER 2002 – REVISED APRIL 2013 www.ti.com Disabled, the LMH6720 inputs and output become high impedances. While disabled the LMH6720 quiescent current is approximately 500 μA. Because of the pull up resistor on the disable circuit the ICC and IEE currents are not balanced in the disabled state. The positive supply current (ICC) is approximately 500μA while the negative supply current (IEE) is only 200μA. The remaining IEE current of 300μA flows through the disable pin. The disable function can be used to create analog switches or multiplexers. Implement a single analog switch with one LMH6720 positioned between an input and output. Create an analog multiplexer with several LMH6720's. The LMH6720 is at it's best at a gain of 1 for multiplexer applications because there is no RG to shunt signals to ground. DISABLE LIMITATIONS (LMH6720 ONLY) The feedback Resistor (RF) limits off isolation in inverting gain configurations. During shutdown the impedance of the LMH6720 inputs and output become very high (>1M Ω), however RF and RG are the dominant factor for effective output impedance. Do not apply voltages greater than +VCC or less than 0V (VCC/2 single supply) to the disable pin. The input ESD diodes will also conduct if the signal leakage through the feedback resistors brings the inverting input near either supply rail. Figure 35. Typical Application with Suggested Supply Bypassing LAYOUT CONSIDERATIONS Whenever questions about layout arise, use the evaluation board as a guide. The following Evaluation boards are available with sample parts: LMH6714 SOT-23 LMH730216 SOIC LMH730227 LMH6720 SOT-23 LMH730216 SOIC LMH730227 LMH6722 SOIC LMH730231 TSSOP LMH730131 To reduce parasitic capacitances, the ground plane should be removed near the input and output pins. To reduce series inductance, trace lengths of components in the feedback loop should be minimized. For long signal paths controlled impedance lines should be used, along with impedance matching at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located anywhere on the board, the smaller ceramic capacitors should be placed as close to the device as possible. In addition Figure 35 shows a capacitor (C1) across the supplies with no connection to ground. This capacitor is optional, however it is required for best 2nd Harmonic suppression. If this capacitor is omitted C2 and C3 should be increased to .1 μF each. 12 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6714 LMH6720 LMH6722 LMH6722-Q1 |
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