24AA256UID datasheet(4/28 Pages) MICROCHIP

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24AA256UID

DS20005215A-page 4

 2013 Microchip Technology Inc.

FIGURE 1-1:

BUS TIMING DATA

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

A0, A1, A2 Chip Address Inputs

The A0, A1 and A2 inputs are used by the 24AA256UID

for multiple device operations. The levels on these

inputs are compared with the corresponding bits in the

slave address. The chip is selected if the compare is

true.

Up to eight devices may be connected to the same bus

by using different Chip Select bit combinations. These

inputs must be connected to either VCC or VSS.

In most applications, the chip address inputs A0, A1

and A2 are hard-wired to logic ‘0’ or logic ‘1’. For

applications in which these pins are controlled by a

microcontroller or other programmable device, the chip

address pins must be driven to logic ‘0’ or logic ‘1’

before normal device operation can proceed.

2.2

Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open drain

terminal. Therefore, the SDA bus requires a pull-up

resistor to VCC (typical 10 k

 for 100 kHz, 2 k for

400 kHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

2.3

Serial Clock (SCL)

This input is used to synchronize the data transfer to

and from the device.

SCL

SDA

OUT

Name

8-pin

PDIP

8-pin

SOIC

8-pin

TSSOP

Function

User Configurable Chip Select

VSS

Ground

SDA

Serial Data

SCL

Serial Clock

Not Connected

VCC

+1.7V to 5.5V

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