DA8444A.005

May 31, 1996

6

FUNCTIONS

Address Byte

Valid addresses are 40, 42, 44, 46, 48, 4A, 4C,

4E(hex), depending on the programming of bits A2, A1

and A0. With these addresses, up to eight MAS8444A

ICs can be operated independently from one I

No other addresses are acknowledged by the

MAS8444A. The address inputs A0, A1 and A2 are

programmed by connection to GND for An = 0 or to

VDD for An = 1. If the inputs are left floating, An = 1 will

result. For MAS8444AS, A2 is always 1.

Instruction and data bytes

Valid instructions from 00 to 0F and F0 to FF (hex);

MAS8444A will not respond to other instruction value,

but will still generate an acknowledgement. Instructions

00 to0F cause auto-incrementing of the sub-address

(bits SD to SA) when more than one data byte is sent

within one transmission. With auto-incrementing, the

first data byte is written into the DAC addessed by bits

SD to SA and then the sub-address is automatically

incremented by one position for the next databyte in

the series. Auto-incrementing does not occur with

instructions F0 to FF. Valid sub-addresses (bits SD to

SA) are 0 to 7 (hex) relating numerically to DAC0 to

DAC7. When the auto-incrementing function is used,

the sub-address will sequence through all possible

values (0 to F, 0 to F, etc.). While the sub-address is

between 8 and F no DAC outputs change.

I

Input SCL (pin 4) and input/output SDA (pin 3) conform

to I

against voltage pulses by internal zener diodes

connected to the ground plane and therefore the

normal bus line voltage shall not exceed 5.5v.

Input Vmax

Input Vmax (pin 2) provides a means of comprising the

output voltage swing of the DACs. The maximum DAC

output voltage is restricted to approximately

Vmax+VDACmin while the 6-bit resolution is

maintained, therefore giving a finer voltage resolution

of smaller output swings.