WM8739 / WM8739L

Advanced Information

AI Rev 2.2 September 2001

27

REGISTER MAP

The complete register map is shown in Table 20. The detailed description can be found in the

relevant text of the device description. There are 8 registers with 9 bits per register. These can be

controlled using either the 2 wire or 3 wire MPU interface.

REGISTER

B

15

B

14

B

13

B

12

B

11

B

10

B9

B8

B7

B6

B5

B4

B3

B2

B1

B0

R0 (00h)

0

0

0

0

0

0

0

LRIN

BOTH

LIN

MUTE

00

LINVOL

R1 (02h)

0

0

0

0

0

0

1

RLIN

BOTH

RIN

MUTE

0

0

RINVOL

R5 (0Ah)

0

0

0

0

1

0

1

0000

HPOR

0

0

0

ADC

HPD

R6 (0Ch)

0

0

0

0

1

1

0

0

PWR

OFF

1

OSCPD

1

1

ADCPD

1

LINEIN

PD

R7 (0Eh)

0

0

0

0

1

1

1

0

0

MS

0

LRP

IWL

FORMAT

R8 (10h)

0

0

0

1

0

0

0

00

CLKI

DIV2

SR

BOSR

USB/

NORM

R9 (12h)

0

0

0

1

0

0

1

00000000

ACTIVE

R15(1Eh)

0

0

0

1

1

1

1

RESET

ADDRESS

DATA

REGISTER

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

4:0

LINVOL[0:4]

10111

( 0dB )

Left Channel Line Input Volume Control

11111 = +12dB . . 1.5dB steps down to

00000 = -34.5dB

7

LINMUTE

1

Left Channel Line Input Mute

1 = Enable Mute

0 = Disable Mute

0000000

Left Line In

8

LRINBOTH

0

Left to Right Channel Line Input Volume

and Mute Data Load Control

1 = Enable Simultaneous Load of

LINVOL[0:4] and LINMUTE to

RINVOL[0:4] and RINMUTE

0 = Disable Simultaneous Load

4:0

RINVOL[0:4]

10111

( 0dB )

Right Channel Line Input Volume

Control

11111 = +12dB . .1.5dB steps down to

00000 = -34.5dB

7

RINMUTE

1

Left Channel Line Input Mute

1 = Enable Mute

0 = Disable Mute

0000001

Right Line In

8

RLINBOTH

0

Right to Left Channel Line Input Volume

and Mute Data Load Control

1 = Enable Simultaneous Load of

RINVOL[0:4] and RINMUTE to

LINVOL[0:4] and LINMUTE

0 = Disable Simultaneous Load