LP2998

VREF

GND

+

+

+

SD

SD

LP2998

GND

+

+

+

SD

SD

0.01 2F

220 2F

47 2F

LP2998, LP2998-Q1

SNVS521K – DECEMBER 2007 – REVISED AUGUST 2014

www.ti.com

Typical Application (continued)

9.2.2 DDR-II Applications

With the separate VDDQ pin and an internal resistor divider it is possible to use the LP2998 in applications

utilizing DDR-II memory. Figure 21 and Figure 22 show several implementations of recommended circuits with

output curves displayed in the Typical Characteristics. Figure 21 shows the recommended circuit configuration

for DDR-II applications. The output stage is connected to the 1.8 V rail and the AVIN pin can be connected to

either a 3.3 V or 5 V rail.

Figure 21. Recommended DDR-II Termination

If it is not desirable to use the 1.8 V rail it is possible to connect the output stage to a 3.3 V rail. Care should be

output voltages. For this reason it is not recommended to power PVIN off a rail higher than the nominal 3.3 V.

The advantage of this configuration is that it has the ability to source and sink a higher maximum continuous

current.

Figure 22. DDR-II Termination with Higher Voltage Rails

9.2.3 SSTL-2 Applications

For the majority of applications that implement the SSTL-2 termination scheme it is recommended to connect all

the input rails to the 2.5 V rail. This provides an optimal trade-off between power dissipation and component

count and selection. An example of this circuit can be seen in Figure 23.

16

Submit Documentation Feedback

Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: LP2998 LP2998-Q1